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| 型號(hào)： | 5962-0923301VPA |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 模擬信號(hào)調(diào)理 |
| 英文描述： | SPECIALTY ANALOG CIRCUIT, CDIP8 |
| 封裝： | CERAMIC, DIP-8 |
| 文件頁(yè)數(shù)： | 3/8頁(yè) |
| 文件大?。?/td> | 764K |
| 代理商： | 5962-0923301VPA |
gm =
(5.1
+
)
W
R
L
-0.714
I
=
MAX
0.65 V
-
5.1
+
W
R
L
www.ti.com
SLUS951A – NOVEMBER 2009 – REVISED JULY 2010
ELECTRICAL CHARACTERISTICS
over operating free-air temperature range, COLL output = 2.4 V to 24 V, VCC = 15 V, ICOLL = 10 mA,
TA = TJ = –55°C to 125°C (unless otherwise noted).
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Reference voltage tolerance
TA = 25°C, VCOLL = 5 V
1.295
1.3
1.305
V
Reference temperature tolerance
VCOLL = 5 V
1.291
1.3
1.309
V
VCC = 2.4 V to 24 V,
Reference line regulation
10
38
mV
VCOLL = 5 V
ICOLL = 10 mA TO 50 mA,
Reference load regulation
10
38
mV
VCOLL = 5 V
Reference sink current
10
mA
Reference source current
-10
mA
EA input bias current
–0.5
–0.2
mA
EA input offset voltage
-4
4
mV
EA+ Operational voltage limitations
0.9
1.6
V
EA output current sink (internally limited)
16
mA
EA output current source
-0.8
mA
Minimum operating current
VCC = 24 V, VCOLL = 5 V
0.5
0.8
mA
VCOLL = VCC = 24 V, Ref = 1.3 V,
Collector current limit(1)
130
155
mA
ISET = GND
Collector saturation
ICOLL = 20 mA
0.7
1.1
1.5
V
VCC = 2.4 V to 24 V,
Transconductance (gm)(1) (2)
–170
–140
–110
mS
VCOLL = 3 V, ISET = GND
Error amplifier AVOL
60
90
dB
Error amplifier GBW
1.5
3
MHz
Transconductance amplifier GBW
3
MHz
(1)
Programmed transconductance and collector current limit equations are specified in the ISET pin description.
(2)
Measured as
ΔICOLL/ΔVCOMP for ICOLL = 5 mA to 20 mA.
PIN DESCRIPTIONS
COLL The collector of the output transistor with a maximum voltage of 24 V. This pin is the output of the
transconducance amplifier. The overall open loop voltage gain of the transconductance amplifier is
gm x RL, where gm is designed to be –140 mS ±30 mS and RL represents the output load.
COMP The output of the error amplifier and the input to the transconductance amplifier. This pin is available to
compensate the high frequency gain of the error amplifier. It is internally voltage limited to approximately 2
V.
EA+
The non-inverting input to the error amplifier.
GND The reference and power ground for the device. The power ground of the output ransistor is isolated on
the chip from the substrate ground used to bias the remainder of the device.
ISET The current set pin for the transconductance amplifier. The transconductance will be –140 mS as specified
in the electrical table if this pin is grounded. If a resistance, RL, is added to the ISET pin, the resulting new
transconductance is calculated using Equation 1. The maximum current will be approximated by
(1)
(2)
REF
The output of the trimmed precision reference. It can source or sink 10 mA and still maintain less than ±1%
output variation.
Copyright 2009–2010, Texas Instruments Incorporated
3
Product Folder Link(s): UC19432-SP
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