參數(shù)資料
型號(hào)： 550FFFREQBGR
廠商： SILICON LABORATORIES
元件分類： VCXO, clock
英文描述： VCXO, CLOCK, 10 MHz - 945 MHz, LVDS OUTPUT
封裝： ROHS COMPLIANT PACKAGE-6
文件頁數(shù)： 34/45頁
文件大?。?/td> 691K
代理商： 550FFFREQBGR
Si550
4
Rev. 0.5
Table 5. CLK± Output Phase Jitter
Parameter
Symbol
Test Condition
Min
Typ
Max
Units
Phase Jitter (RMS)1,2,3
for FOUT > 500 MHz
φ
J
Kv = 45 ppm/V
12 kHz to 20 MHz (OC-48)
50 kHz to 80 MHz (OC-192)
—
0.35
0.38
—
ps
Kv = 90 ppm/V
12 kHz to 20 MHz (OC-48)
50 kHz to 80 MHz (OC-192)
—
0.43
0.41
—
Kv = 135 ppm/V
12 kHz to 20 MHz (OC-48)
50 kHz to 80 MHz (OC-192)
—
0.52
0.46
—
Kv = 180 ppm/V
12 kHz to 20 MHz (OC-48)
50 kHz to 80 MHz (OC-192)
—
0.64
0.52
—
Phase Jitter (RMS)1,2,3
for FOUT of 125 to 500 MHz
φ
J
Kv = 45 ppm/V
12 kHz to 20 MHz (OC-48)
50 kHz to 80 MHz (OC-192)
—
0.42
0.58
—
ps
Kv = 90 ppm/V
12 kHz to 20 MHz (OC-48)
50 kHz to 80 MHz (OC-192)
—
0.48
0.60
—
Kv = 135 ppm/V
12 kHz to 20 MHz (OC-48)
50 kHz to 80 MHz (OC-192)
—
0.57
0.64
—
Kv = 180 ppm/V
12 kHz to 20 MHz (OC-48)
50 kHz to 80 MHz (OC-192)
—
0.67
0.68
—
Notes:
1. Differential Modes: LVPECL/LVDS/CML. Refer to AN255, AN256, and AN266 for further information.
2. For best jitter and phase noise performance, always choose the smallest KV that meets the application’s minimum APR
requirements. See “AN266: VCXO Tuning Slope (KV), Stability, and Absolute Pull Range (APR)” for more information.
3. See “AN255: Replacing 622 MHz VCSO devices with the Si550 VCXO” for comparison highlighting power supply
rejection (PSR) advantage of Si55x versus SAW-based solutions.
Table 6. CLK± Output Period Jitter
Parameter
Symbol
Test Condition
Min
Typ
Max
Units
Period Jitter*
for FOUT < 160 MHz
JPER
RMS
—
2
—
ps
Peak-to-Peak
—
14
—
*Note: Any output mode, including CMOS, LVPECL, LVDS, CML. N = 1000 cycles. Refer to AN279 for further information.
相關(guān)PDF資料
PDF描述
571AMAFREQDG VCXO, CLOCK, 10 MHz - 945 MHz, LVPECL OUTPUT
571DBAFREQDGR VCXO, CLOCK, 10 MHz - 945 MHz, CMOS OUTPUT
571GDAFREQDGR VCXO, CLOCK, 10 MHz - 160 MHz, CMOS OUTPUT
571MKAFREQDG VCXO, CLOCK, 10 MHz - 945 MHz, LVPECL OUTPUT
571SAAFREQDG VCXO, CLOCK, 10 MHz - 945 MHz, LVDS OUTPUT
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
550FG500M000DG 制造商:Silicon Laboratories Inc 功能描述:CNTRLD OSC 500MHZ VCXO LVDS 6SMD - Trays
550FG500M000DGR 制造商:Silicon Laboratories Inc 功能描述:CNTRLD OSC 500MHZ VCXO LVDS 6SMD - Tape and Reel
550FH200M000DG 功能描述:標(biāo)準(zhǔn)時(shí)鐘振蕩器 SINGLE VCXO 6 PIN 0.5PS RS JTR RoHS:否 制造商:AVX 產(chǎn)品:Standard Clock Oscillators 封裝 / 箱體:7 mm x 5 mm 頻率:75 MHz 頻率穩(wěn)定性:50 PPM 電源電壓:2.5 V 負(fù)載電容: 端接類型:SMD/SMT 最小工作溫度:0 C 最大工作溫度:+ 70 C 輸出格式:LVDS 尺寸: 封裝:Reel 系列:
550FH200M000DGR 制造商:Silicon Laboratories Inc 功能描述:OSCILLATOR - Tape and Reel
550FH500M000DG 制造商:Silicon Laboratories Inc 功能描述:CONTROLLED OSCILLATOR 500MHZ VCXO LVDS 6-PIN SMD - Trays
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