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參數(shù)資料
| 型號： | 550CD74M2500BG |
| 廠商： | SILICON LABORATORIES |
| 元件分類： | VCXO, clock |
| 英文描述： | VCXO, CLOCK, 74.25 MHz, CMOS OUTPUT |
| 封裝： | ROHS COMPLIANT, SMD, 6 PIN |
| 文件頁數(shù)： | 1/44頁 |
| 文件大?。?/td> | 556K |
| 代理商： | 550CD74M2500BG |
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Rev. 0.5 7/06
Copyright 2006 by Silicon Laboratories
Si550
VOLTAGE-CONTROLLED CRYSTAL OSCILLATOR (VCXO)
10 MHZ TO 1.4 GHZ
Features
Applications
Description
The Si550 VCXO utilizes Silicon Laboratories’ advanced DSPLL circuitry to
provide a low-jitter clock at high frequencies. The Si550 is available with
any-rate output frequency from 10 to 945 MHz and selected frequencies to
1400 MHz. Unlike traditional VCXO’s where a different crystal is required for
each output frequency, the Si550 uses one fixed crystal to provide a wide
range of output frequencies. This IC based approach allows the crystal
resonator to provide exceptional frequency stability and reliability. In
addition, DSPLL clock synthesis provides superior supply noise rejection,
simplifying the task of generating low-jitter clocks in noisy environments
typically found in communication systems. The Si550 IC-based VCXO is
factory configurable for a wide variety of user specifications, including
frequency, supply voltage, output format, tuning slope, and temperature
stability. Specific configurations are factory programmed at time of shipment,
thereby eliminating long lead times associated with custom oscillators.
Functional Block Diagram
Available with any-rate output
frequencies from 10 MHz to
945 MHz and selected frequencies
to 1.4 GHz
3rd generation DSPLL with
superior jitter performance
3x better frequency stability than
SAW based oscillators
Internal fixed crystal frequency
ensures high reliability and low
aging
Available CMOS, LVPECL,
LVDS, & CML outputs
3.3, 2.5, and 1.8 V supply options
Industry-standard 5 x 7 mm
package and pinout
Lead-free/RoHS-compliant
SONET / SDH
xDSL
10 GbE LAN / WAN
Low-jitter clock generation
Optical modules
Clock and data recovery
Fixed
Frequency
XO
Any-rate
10-1400 MHz
DSPLL
Clock Synthesis
ADC
VDD
CLK+
CLK–
Vc
OE
GND
Ordering Information:
See page 7.
Pin Assignments:
See page 6.
(Top View)
Si5602
1
2
3
6
5
4
VC
GND
OE
VDD
CLK+
CLK–
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 550CD74M2500DGR | 功能描述:74.25MHz CMOS VCXO Oscillator Surface Mount 3.3V 98mA Enable/Disable 制造商:silicon labs 系列:Si550 包裝:帶卷（TR） 零件狀態(tài):有效 類型:VCXO 頻率:74.25MHz 功能:啟用/禁用 輸出:CMOS 電壓 - 電源:3.3V 頻率穩(wěn)定度:±50ppm 工作溫度:-40°C ~ 85°C 電流 - 電源（最大值）:98mA 等級:- 安裝類型:表面貼裝 大小/尺寸:0.276" 長 x 0.197" 寬（7.00mm x 5.00mm） 高度:0.071"（1.80mm） 封裝/外殼:6-SMD，無引線（DFN，LCC） 電流 - 電源（禁用）（最大值）:75mA 標(biāo)準(zhǔn)包裝:250 |
| 550CD77M7600DG | 制造商:Silicon Laboratories Inc 功能描述:CNTRLD OSC 77.76MHZ VCXO CMOS 6SMD - Trays |
| 550CD77M7600DGR | 制造商:Silicon Laboratories Inc 功能描述:CNTRLD OSC 77.76MHZ VCXO CMOS 6SMD - Tape and Reel |
| 550CD89M6000DGR | 制造商:Silicon Laboratories Inc 功能描述: |
| 550CE1112 | 制造商:Cornell Dubilier Electronics 功能描述: |
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