參數(shù)資料
型號(hào): 550AD120M000BG
廠商: SILICON LABORATORIES
元件分類: VCXO, clock
英文描述: VCXO, CLOCK, 120 MHz, LVPECL OUTPUT
封裝: ROHS COMPLIANT, SMD, 6 PIN
文件頁(yè)數(shù): 44/44頁(yè)
文件大?。?/td> 556K
代理商: 550AD120M000BG
Si550
Rev. 0.5
9
5. 6-Pin PCB Land Pattern
Figure 3 illustrates the 6-pin PCB land pattern for the Si550. Table 12 lists the values for the dimensions shown in
the illustration.
Figure 3. Si550 PCB Land Pattern
Table 12. PCB Land Pattern Dimensions (mm)
Dimension
Min
Max
D2
5.08 REF
e
2.54 BSC
E2
4.15 REF
GD
0.84
GE
2.00
VD
8.20 REF
VE
7.30 REF
X1.70 TYP
Y2.15 REF
ZD
6.78
ZE
6.30
Notes:
1. Dimensioning and tolerancing per the ANSI Y14.5M-1994 specification.
2. Land pattern design based on IPC-7351 guidelines.
3. All dimensions shown are at maximum material condition (MMC).
4. Controlling dimension is in millimeters (mm).
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