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參數(shù)資料
| 型號： | 426GT |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時鐘產(chǎn)生/分配 |
| 英文描述： | 156.25 MHz, OTHER CLOCK GENERATOR, PDSO16 |
| 封裝： | 0.173 INCH, TSSOP-16 |
| 文件頁數(shù)： | 5/7頁 |
| 文件大?。?/td> | 174K |
| 代理商： | 426GT |
ICS426
SERIAL ATA/FIBER CHANNEL CLOCK SYNTHESIZER
CLOCK SYNTHESIZER
IDT / ICS SERIAL ATA/FIBER CHANNEL CLOCK SYNTHESIZER
5
ICS426
REV B 091102
Recommended Operation Conditions
DC Electrical Characteristics
Unless stated otherwise, VDD = 3.3V ±5%, Ambient Temperature 0 to +70
° C
AC Electrical Characteristics
Unless stated otherwise, VDD = 3.3V ±5%, Ambient Temperature 0 to +70
° C
Note 1: Measured with 15 pF load.
Parameter
Min.
Typ.
Max.
Units
Ambient Operating Temperature
0
+70
° C
Power Supply Voltage (measured in respect to GND)
+3.13
+3.3
+3.46
V
Parameter
Symbol
Conditions
Min.
Typ.
Max.
Units
Operating Voltage
VDD
3.13
3.3
3.47
V
Supply Current
IDD
No load
22
mA
Input High Voltage
VIH
OE, S0, S1
2
V
Input Low Voltage
VIL
OE, S0, S1
0.8
V
Output High Voltage
VOH
IOH = -4 mA
VDD-0.4
V
Output High Voltage
VOH
IOH = -12 mA
2.4
V
Output Low Voltage
VOL
IOL = 12mA
0.4
V
Short Circuit Current
IOS
CLK output
±50
mA
On Chip Pull-up Resistor
RPU
OE, S0, S1
150
k
Input Capacitance
CIN
OE, S0, S1
5
pF
Parameter
Symbol
Conditions
Min.
Typ.
Max.
Units
Input Frequency
FIN
Crystal or clock input
25
MHz
Output Clock Duty Cycle
Measured at VDD/2, Note 1
45
50
55
%
Output Rise Time
tOR
0.8 to 2.0V, Note 1
1
ns
Output Fall Time
tOF
2.0 to 0.8V, Note 1
1
ns
Short Term Jitter
peak to peak, Note 1
±70
ps
Long Term Jitter
Measured over 1000 cycles;
peak to peak, Note 1
170
ps
Phase Noise
106.25M CLK, relative to carrier,
100 Hz offset
-90
dBc/Hz
106.25M CLK, relative to carrier,
1kHz offset
-115
dBc/Hz
106.25M CLK, relative to carrier,
10 kHz offset
-121
dBc/Hz
106.25M CLK, relative to carrier,
100 kHz offset
-116
dBc/Hz
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