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| 型號(hào)： | 29104BJA |
| 廠商： | INTERSIL CORP |
| 元件分類： | DRAM |
| 英文描述： | 2K x 8 Asynchronous CMOS Static RAM |
| 中文描述： | 2K X 8 STANDARD SRAM, 90 ns, CDIP24 |
| 封裝： | CERAMIC, DIP-24 |
| 文件頁數(shù)： | 1/7頁 |
| 文件大?。?/td> | 145K |
| 代理商： | 29104BJA |
1
TM
March 1997
HM-65162
2K x 8 Asynchronous
CMOS Static RAM
Features
Fast Access Time . . . . . . . . . . . . . . . . . . . 70/90ns Max
Low Standby Current. . . . . . . . . . . . . . . . . . . .50
μ
A Max
Low Operating Current . . . . . . . . . . . . . . . . . 70mA Max
Data Retention at 2.0V. . . . . . . . . . . . . . . . . . .20
μ
A Max
TTL Compatible Inputs and Outputs
JEDEC Approved Pinout (2716, 6116 Type)
No Clocks or Strobes Required
Equal Cycle and Access Time
Single 5V Supply
Gated Inputs
No Pull-Up or Pull-Down Resistors Required
Description
The HM-65162 is a CMOS 2048 x 8 Static Random Access
Memory manufactured using the Intersil Advanced SAJI V
process. The device utilizes asynchronous circuit design for
fast cycle time and ease of use. The pinout is the JEDEC 24
pin DIP, and 32 pad 8-bit wide standard which allows easy
memory board layouts flexible to accommodate a variety of
industry standard PROMs, RAMs, ROMs and EPROMs. The
HM-65162 is ideally suited for use in microprocessor based
systems with its 8-bit word length organization. The conve-
nient output enable also simplifies the bus interface by allow-
ing the data outputs to be controlled independent of the chip
enable. Gated inputs lower operating current and also elimi-
nate the need for pull-up or pull-down resistors.
Pinouts
Ordering Information
PACKAGE
TEMP. RANGE
-40
o
C to +85
o
C
-55
o
C to +125
o
C
-55
o
C to +125
o
C
-40
o
C to +85
o
C
-55
o
C to 125
o
C
70ns/20
μ
A
(NOTE 1)
90ns/40
μ
A
(NOTE 1)
90ns/300
μ
A
(NOTE 1)
PKG. NO.
CERDIP
HM1-65162B-9
HM1-65162-9
HM1-65162C-9
F24.6
JAN#
29110BJA
29104BJA
-
F24.6
SMD#
8403606JA
8403602JA
8403603JA
F24.6
CLCC
HM4-65162B-9
HM4-65162-9
HM4-65162C-9
J32.A
SMD#
8403606ZA
8403602ZA
8403603ZA
J32.A
NOTE:
1. Access time/data retention supply current.
HM-65162
(CERDIP)
TOP VIEW
HM-65162
(CLCC)
TOP VIEW
1
2
3
4
5
6
7
8
9
10
11
12
16
17
18
19
20
21
22
23
24
15
14
13
V
CC
A8
A9
W
G
A10
DQ7
DQ5
DQ4
DQ3
E
DQ6
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
DQ1
DQ2
GND
5
6
7
8
11
10
9
13
12
27
28
29
26
25
24
23
22
21
3
2
1
4
32
31
30
16
17
18
19
20
14
15
A6
A5
A4
A3
A2
A1
A0
NC
DQ0
D
D
G
N
D
D
D
V
C
N
N
A
N
N
N
A8
A9
NC
G
A10
E
DQ7
DQ6
W
PIN
DESCRIPTION
NC
No Connect
A0 - A10
Address Input
E
Chip Enable/Power Down
V
SS
/GND
Ground
DQ0 - DQ7
Data In/Data Out
V
CC
Power (+5V)
W
Write Enable
G
Output Enable
FN3000.1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143
Intersil (and design) is a trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2002. All Rights Reserved
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