參數(shù)資料
型號(hào)： 28F640J3C-120
廠商： Intel Corp.
英文描述： Intel StrataFlash Memory (J3)
中文描述： 英特爾StrataFlash存儲(chǔ)器（J3）
文件頁(yè)數(shù)： 19/72頁(yè)
文件大小： 905K
代理商： 28F640J3C-120
256-Mbit J3 (x8/x16)
Datasheet
19
6.0
Electrical Specifications
6.1
DC Current Characteristics
Table 6. DC Current Characteristics (Sheet 1 of 2)
VCCQ
2.7 - 3.6V
Test Conditions
Notes
VCC
2.7 - 3.6V
Symbol
Parameter
Typ
Max
Unit
I
LI
Input and V
PEN
Load Current
±
1
μ
A
V
CC
= V
CC
Max; V
CCQ
= V
CCQ
Max
V
IN
= V
CCQ
or GND
1
I
LO
Output Leakage Current
±
10
μ
A
V
CC
= V
CC
Max; V
CCQ
= V
CCQ
Max
V
IN
= V
CCQ
or GND
1
I
CCS
V
CC
Standby Current
50
120
μ
A
CMOS Inputs, V
= V
CC
Max,
Device is disabled (see
Table 13, “Chip Enable
Truth Table” on page 33
),
RP# = V
CCQ
± 0.2 V
1,2,3
0.71
2
mA
TTL Inputs, V
= V
Max,
Device is disabled (see
Table 13
), RP# = V
IH
I
CCD
V
CC
Power-Down Current
50
120
μ
A
RP# = GND ± 0.2 V, I
OUT
(STS) = 0 mA
I
CCR
V
Page Mode Read
Current
4-
word
Page
15
20
mA
CMOS Inputs, V
= V
Max, V
= V
Max using standard 4 word page mode reads.
Device is enabled (see
Table 13
)
f = 5 MHz, I
OUT
= 0 mA
1,3
24
29
mA
CMOS Inputs,V
= V
Max, V
= V
Max using standard 4 word page mode reads.
Device is enabled (see
Table 13
)
f = 33 MHz, I
OUT
= 0 mA
8-
word
Page
10
15
mA
CMOS Inputs, V
= V
Max, V
=
V
Max using standard 8 word page
mode reads.
Device is enabled (see
Table 13
)
f = 5 MHz, I
OUT
= 0 mA
30
54
mA
CMOS Inputs,V
= V
Max, V
=
V
Max using standard 8 word page
mode reads.
Device is enabled (see
Table 13
)
f = 33 MHz, I
OUT
= 0 mA
Density: 128-, 64-, and 32- Mbit
26
46
mA
CMOS Inputs,V
CC
= V
CC
Max, V
CCQ
=
V
CCQ
Max using standard 8 word page
mode reads.
Device is enabled (see
Table 13
)
f = 33 MHz, I
OUT
= 0 mA
Density: 256Mbit
I
CCW
V
Program or Set Lock-
Bit Current
35
60
mA
CMOS Inputs, V
PEN
= V
CC
1,4
40
70
mA
TTL Inputs, V
PEN
= V
CC
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