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參數(shù)資料
| 型號(hào)： | 24AA02T-I/SM |
| 元件分類(lèi)： | PROM |
| 英文描述： | 256 X 8 I2C/2-WIRE SERIAL EEPROM, PDSO8 |
| 封裝： | 0.207 INCH, PLASTIC, SOIC-8 |
| 文件頁(yè)數(shù)： | 11/13頁(yè) |
| 文件大?。?/td> | 191K |
| 代理商： | 24AA02T-I/SM |
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24AA01/02
1998 Microchip Technology Inc.
DS21052H-page 7
5.0
ACKNOWLEDGE POLLING
Since the device will not acknowledge during a write
cycle, this can be used to determine when the cycle is
complete (this feature can be used to maximize bus
throughput). Once the stop condition for a write com-
mand has been issued from the master, the device ini-
tiates the internally timed write cycle. ACK polling can
be initiated immediately. This involves the master send-
ing a start condition followed by the control byte for a
write command (R/W = 0). If the device is still busy with
the write cycle, then no ACK will be returned. If the
cycle is complete, then the device will return the ACK
and the master can then proceed with the next read or
write command. See Figure 5-1 for ow diagram.
FIGURE 5-1:
ACKNOWLEDGE POLLING
FLOW
6.0
WRITE PROTECTION
The 24AA01/02 can be used as a serial ROM when the
WP pin is connected to VCC. Programming will be inhib-
ited and the entire memory will be write-protected.
7.0
READ OPERATION
Read operations are initiated in the same way as write
operations with the exception that the R/W bit of the
slave address is set to one. There are three basic types
of read operations: current address
read, random
read, and sequential read.
7.1
Current Address Read
The 24AA01/02 contains an address counter that
maintains the address of the last word accessed, inter-
nally incremented by one. Therefore, if the previous
access (either a read or write operation) was to
address n, the next current address read operation
would access data from address n + 1. Upon receipt of
the slave address with R/W bit set to one, the 24AA01/
02 issues an acknowledge and transmits the eight bit
data word. The master will not acknowledge the trans-
fer but does generate a stop condition and the 24AA01/
02 discontinues transmission (Figure 7-1).
7.2
Random Read
Random read operations allow the master to access
any memory location in a random manner. To perform
this type of read operation, rst the word address must
be set. This is done by sending the word address to the
24AA01/02 as part of a write operation. After the word
address is sent, the master generates a start condition
following the acknowledge. This terminates the write
operation, but not before the internal address pointer is
set. Then the master issues the control byte again but
with the R/W bit set to a one. The 24AA01/02 will then
issue an acknowledge and transmits the eight bit data
word. The master will not acknowledge the transfer but
does generate a stop condition and the 24AA01/02 dis-
continues transmission (Figure 7-2).
7.3
Sequential Read
Sequential reads are initiated in the same way as a ran-
dom read except that after the 24AA01/02 transmits the
rst data byte, the master issues an acknowledge as
opposed to a stop condition in a random read. This
directs the 24AA01/02 to transmit the next sequentially
addressed 8-bit word (Figure 7-3).
To provide sequential reads the 24AA01/02 contains an
internal address pointer which is incremented by one at
the completion of each operation. This address pointer
allows the entire memory contents to be serially read
during one operation.
7.4
Noise Protection
The 24AA01/02 employs a VCC threshold detector cir-
cuit which disables the internal erase/write logic if the
VCC is below 1.5 volts at nominal conditions.
The SCL and SDA inputs have Schmitt trigger and lter
circuits which suppress noise spikes to assure proper
device operation even on a noisy bus.
Send
Write Command
Send Stop
Condition to
Initiate Write Cycle
Send Start
Send Control Byte
with R/W = 0
Did Device
Acknowledge
(ACK = 0)?
Next
Operation
No
Yes
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 24AA02UID | 制造商:MICROCHIP 制造商全稱(chēng):Microchip Technology 功能描述:2K I2Ca?￠ Serial EEPROMs with Unique 32-bit Serial Number |
| 24AA02UID-I/P | 功能描述:電可擦除可編程只讀存儲(chǔ)器 2K I2C EE Unique ID RoHS:否 制造商:Intersil 存儲(chǔ)容量: 組織: 數(shù)據(jù)保留: 最大時(shí)鐘頻率: 最大工作電流: 工作電源電壓: 最大工作溫度: 安裝風(fēng)格: 封裝 / 箱體: |
| 24AA02UID-I/SN | 功能描述:電可擦除可編程只讀存儲(chǔ)器 2K I2C EE Unique ID RoHS:否 制造商:Intersil 存儲(chǔ)容量: 組織: 數(shù)據(jù)保留: 最大時(shí)鐘頻率: 最大工作電流: 工作電源電壓: 最大工作溫度: 安裝風(fēng)格: 封裝 / 箱體: |
| 24AA02UIDT-I/OT | 功能描述:電可擦除可編程只讀存儲(chǔ)器 2K I2C EE Unique ID RoHS:否 制造商:Intersil 存儲(chǔ)容量: 組織: 數(shù)據(jù)保留: 最大時(shí)鐘頻率: 最大工作電流: 工作電源電壓: 最大工作溫度: 安裝風(fēng)格: 封裝 / 箱體: |
| 24AA02UIDT-I/SN | 功能描述:電可擦除可編程只讀存儲(chǔ)器 2K I2C EE Unique ID RoHS:否 制造商:Intersil 存儲(chǔ)容量: 組織: 數(shù)據(jù)保留: 最大時(shí)鐘頻率: 最大工作電流: 工作電源電壓: 最大工作溫度: 安裝風(fēng)格: 封裝 / 箱體: |
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