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參數(shù)資料
| 型號： | μPG152TA |
| 廠商： | NEC Corp. |
| 英文描述： | L-Band SPDT Switch(單刀雙擲開關) |
| 中文描述： | L波段單刀雙擲開關（單刀雙擲開關） |
| 文件頁數(shù)： | 2/12頁 |
| 文件大?。?/td> | 83K |
| 代理商： | ΜPG152TA |
2
P
PG152TA
PIN CONNECTION DIAGRAM
PIN No.
CONNECTION
PIN No.
CONNECTION
1
OUT1
4
V
CONT 2
2
GND
5
IN
3
OUT2
6
V
CONT 1
RECOMMENDED OPERATING CONDITIONS (T
A
= 25 °C)
PARAMETERS
SYMBOL
MIN.
TYP.
MAX.
UNIT
Control Voltage (OFF)
V
CONT
+2.7
+3.0
+5.3
V
Control Voltage (ON)
V
CONT
e
0.2
0
+0.2
V
Input Power (V
CONT
= 3 V/0 V)
P
in
+27
+29
dBm
ELECTRICAL CHARACTERISTICS (Unless otherwise specified, T
A
= 25 °C, V
CONT1
= 3 V,
V
CONT2
= 0 V or V
CONT1
= 0 V, V
CONT2
= 3 V, Off chip DC blocking capacitors value; 51 pF)
CHARACTERISTICS
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
Insertion Loss
L
INS
f = 100 M to 2 GHz
0.6
1.0
dB
f = 2.5 GHz
0.8
Note 1
Isolation
ISL
f = 100 M to 2 GHz
20
22
dB
f = 2.5 GHz
20
Note 1
Input Return Loss
RI
in
f = 100 M to 2 GHz
11
dB
Output Return Loss
RI
out
f = 100 M to 2 GHz
11
dB
Input Power at 1 dB
Compression Point
Note 2
P
in(1 dB)
f = 1 GHz to 2 GHz
27
30
dBm
Switching Speed
t
sw
30
ns
Control Current
I
CONT
V
CONT
= 3 V/0 V RF None
5
P
A
Notes 1
Characteristic for reference at 2.0 to 2.5 GHz
2
Pin(1 dB) is measured the input power level when the insertion loss increase more 1 dB than that of
linear range. All other characteristics are measured in linear range.
3
When the
P
PG152TA is used it is necessary to use DC blocking capacitors for No.1 (OUT1), No.3
(OUT2) and No.5 (IN). The value of DC blocking capacitors should be chosen to accommodate the
frequency of operation, band width, switching speed and the condition with actual board of your system.
The range of recommended DC blocking capacitor value is less than 100 pF.
4
The distance between IC’s GND pin and ground pattern of substrate should be as shorter as possible to
avoid parasitic parameters.
3
2
1
4
5
6
(Top View)
4
5
6
3
2
1
(Bottom View)
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