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參數(shù)資料
| 型號： | μPD78P0308Y |
| 廠商： | NEC Corp. |
| 元件分類： | 8位微控制器 |
| 英文描述： | 8 Bit Single Chip Microcontrollers |
| 中文描述： | 8位單片機微控制器 |
| 文件頁數(shù)： | 34/70頁 |
| 文件大?。?/td> | 552K |
| 代理商： | ΜPD78P0308Y |
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34
μ
PD78P0308Y
Preliminary Data Sheet
MAIN SYSTEM CLOCK OSCILLATOR CHARACTERISTICS (T
A
= –40 to +85
°
C, V
DD
= 2.7 to 5.5 V)
Unit
MHz
ms
MHz
ms
MHz
ns
MAX.
5.0
4
5
10
30
5.0
500
Recommended
circuit
Parameter
Oscillation
frequency (f
X
)
Note 1
Oscillation
stabilization time
Note 2
Oscillation
frequency (f
X
)
Note 1
Oscillation
stabilization time
Note 2
X1 input
frequency (f
X
)
Note 1
X1 input
high-/low-level width
(t
XH
, t
XL
)
MIN.
1.0
1
1.0
85
Resonator
Ceramic
resonator
Crystal
resonator
External clock
Notes 1.
Indicates only oscillator characteristics. Refer to
AC Characteristics
for instruction execution time.
2.
Time required to stabilize oscillation after reset or STOP mode release.
Cautions
1.
When using the main system clock oscillator, wiring in the area enclosed with the broken line should
be carried out as follows to avoid an adverse effect from wiring capacitance.
Wiring should be as short as possible.
Wiring should not cross other signal lines.
Wiring should not be placed close to a varying high current.
The potential of the oscillator capacitor ground should be the same as V
SS
.
Do not ground it to the ground pattern in which a high current flows.
Do not fetch a signal from the oscillator.
2.
If the main system clock oscillator is operated by the subsystem clock when the main system clock
is stopped, reswitching to the main system clock should be performed after the oscillation
stabilization time has been obtained by the program.
TYP.
μ
PD74HCU04
Test conditions
V
DD
= Oscillation
voltage range
After V
DD
reaches oscil-
lation voltage range MIN.
V
DD
= 4.5 to 5.5 V
X1
X2
X1
X2
V
PP
R1
C1
C2
X1
X2
V
PP
R1
C1
C2
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