參數(shù)資料
型號(hào): μPD789177Y
廠商: NEC Corp.
英文描述: 8 Bit Single Chip Microcontrollers(8 位單片微控制器)
中文描述: 8位單片機(jī)微控制器(8位單片微控制器)
文件頁數(shù): 15/145頁
文件大?。?/td> 610K
代理商: ΜPD789177Y
Preliminary Product Information
14
μ
PD789166Y, 789167Y, 789176Y, 789177Y
3.2
Non-Port Pins
Pin name
I/O
Function
When reset
Also used as
INTP0
Input
Input
P30/TI81/CPT90
INTP1
P31/TO81
INTP2
P32/TO90
INTP3
P33/TO82/BZO90
SI20
Input
Serial data input to serial interface
Input
P22/RxD20
SO20
Output
Serial data output from serial interface
Input
P21/TxD20
SCK20
I/O
Serial clock input/output for serial interface
Input
P20/ASCK20
ASCK20
Input
Serial clock input to asynchronous serial interface
Input
P20/SCK20
RxD20
Input
Serial data input to asynchronous serial interface
Input
P22/SI20
TxD20
Output
Serial data output from asynchronous serial interface
Input
P21/SO20
SCL0
I/O
SMB0 clock input/output
Input
P23
SDA0
I/O
SMB0 data input/output
Input
P24
SS20
Input
Chip select input to serial interface
Input
P25/TI80
TI80
Input
External count clock input to 8-bit timer (TM80)
Input
P25/SS20
TI81
Input
External count clock input to 8-bit timer (TM81)
Input
P30/INTP0/CPT90
TO80
Output
8-bit timer (TM80) output
Input
P26
TO81
Output
8-bit timer (TM81) output
Input
P31/INTP1
TO82
Output
8-bit timer (TM82) output
Input
P33/INTP3/BZO90
TO90
Output
16-bit timer (TM90) output
Input
P32/INTP2
CPT90
Input
Capture edge input
Input
P30/INTP0/TI81
BZO90
Output
Buzzer output
Input
P33/INTP3/TO82
ANI0-ANI7
Input
A/D converter analog input
Input
P60-P67
AV
REF
A/D converter reference voltage
AV
SS
A/D converter ground potential
AV
DD
A/D converter analog power supply
X1
Input
Connected to crystal for main system clock oscillation
X2
XT1
Input
Connected to crystal for subsystem clock oscillation
XT2
RESET
Input
System reset input
Input
V
DD
Positive supply voltage
V
SS
Ground potential
IC
This pin is internally connected. Connect this pin directly to the
V
SS
pin.
NC
This pin is not connected internally. Connect this pin to the V
SS
pin (or leave this pin open).
External interrupt input for which effective edges (rising and/or
falling edges) can be set
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