參數(shù)資料
型號: μPD784044
廠商: NEC Corp.
英文描述: 16 Bit Single Chip Microcontrollers(16位單片微控制器)
中文描述: 16位單片機微控制器(16位單片微控制器)
文件頁數(shù): 40/62頁
文件大?。?/td> 366K
代理商: ΜPD784044
m
PD784044,
784046
40
Table 8-2. Interrupt Sources
Type
Default
Source
Internal/
Macro
Priority
Name
Trigger
External
Service
Software
BRK instruction
Execution of instruction
Operand error
If result of exclusive OR of operands byte and byte
is not FFH when MOV STBC, #byte or MOV WDM,
#byte instruction is executed
Non-
NMI
Detection of pin input edge
External
maskable
INTWDT
Overflow of watchdog timer
Internal
Maskable
0 (highest)
INTOV0
Overflow of timer 0
1
INTOV1
Overflow of timer 1
2
INTOV4
Overflow of timer 4
3
INTP0
Detection of pin input edge (CC00 capture trigger)
External
INTCC00
Generation of TM0-CC00 coincidence signal
Internal
4
INTP1
Detection of pin input edge (CC01 capture trigger)
External
INTCC01
Generation of TM0-CC01 coincidence signal
Internal
5
INTP2
Detection of pin input edge (CC02 capture trigger)
External
INTCC02
Generation of TM0-CC02 coincidence signal
Internal
6
INTP3
Detection of pin input edge (CC03 capture trigger)
External
INTCC03
Generation of TM0-CC03 coincidence signal
Internal
7
INTP4
Detection of pin input edge
(A/D converter conversion start trigger)
External
8
INTP5
Detection of pin input edge (TM2 event counter input)
9
INTP6
Detection of pin input edge (TM3 event counter input)
10
INTCM10
Generation of TM1-CM10 coincidence signal
Internal
11
INTCM11
Generation of TM1-CM11 coincidence signal
12
INTCM20
Generation of TM2-CM20 coincidence signal
13
INTCM21
Generation of TM2-CM21 coincidence signal
14
INTCM30
Generation of TM3-CM30 coincidence signal
15
INTCM31
Generation of TM3-CM31 coincidence signal
16
INTCM40
Generation of TM4-CM40 coincidence signal
17
INTCM41
Generation of TM4-CM41 coincidence signal
18
INTSER
Occurrence of UART0 reception error
19
INTSR
End of UART0 reception
INTCSI1
End of 3-wire serial I/O1 transfer
20
INTST
End of UART0 transfer
21
INTSER2
Occurrence of UART2 reception error
22
INTSR2
End of UART2 reception
INTCSI2
End of 3-wire serial I/O2 transfer
23
INTST2
End of UART2 transfer
24 (lowest)
INTAD
End of A/D converter conversion (transfer to ADCR)
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