– xi –
2-1
Pin Input/Output Circuits......................................................................................................
35
3-1
3-2
3-3
3-4
3-5
3-6
3-7
3-8
3-9
3-10
3-11
3-12
3-13
3-14
μ
PD784031 Memory Map ....................................................................................................
μ
PD784035 Memory Map ....................................................................................................
μ
PD784036 Memory Map ....................................................................................................
μ
PD784037 Memory Map ....................................................................................................
μ
PD784038 Memory Map ....................................................................................................
Internal RAM Memory Map..................................................................................................
Internal Memory Size Switching Register (IMS) Format....................................................
Program Counter (PC) Format ............................................................................................
Program Status Word (PSW) Format..................................................................................
Stack Pointer (SP) Format...................................................................................................
Data Saved to Stack Area ...................................................................................................
Data Restored from Stack Area ..........................................................................................
General-Purpose Register Format ......................................................................................
General-Purpose Register Addresses.................................................................................
39
40
41
42
43
50
53
54
55
61
62
63
64
65
4-1
4-2
4-3
4-4
4-5
4-6
4-7
Clock Generator Block Diagram ..........................................................................................
Clock Oscillator External Circuitry.......................................................................................
Standby Control Register (STBC) Format ..........................................................................
Oscillation Stabilization Time Specification Register (OSTS) Format...............................
Signal Extraction with External Clock Input ........................................................................
Cautions on Resonator Connection ....................................................................................
Incorrect Example of Resonator Connection ......................................................................
77
78
80
81
84
85
86
5-1
5-2
5-3
5-4
5-5
5-6
5-7
5-8
5-9
5-10
5-11
5-12
5-13
5-14
5-15
5-16
5-17
5-18
Port Configuration ................................................................................................................
Port 0 Block Diagram ...........................................................................................................
Port 0 Mode Register (PM0) Format...................................................................................
Port Specified as Output Port..............................................................................................
Port Specified as Input Port.................................................................................................
Pull-Up Resistor Option Register (PUO) Format................................................................
Pull-Up Resistor Specification (Port 0) ...............................................................................
Example of Transistor Drive ................................................................................................
Block Diagram of P10 and P11 (Port 1) .............................................................................
Block Diagram of P12 (Port 1) ............................................................................................
Block Diagram of P13 (Port 1) ............................................................................................
Block Diagram of P14 (Port 1) ............................................................................................
Block Diagram of P15 to P17 (Port 1) ................................................................................
Port 1 Mode Register (PM1) Format...................................................................................
Port 1 Mode Control Register (PMC1) Format ...................................................................
Port Specified as Output Port..............................................................................................
Port Specified as Input Port.................................................................................................
Control Specification ............................................................................................................
89
91
92
93
94
95
96
97
99
100
101
102
103
104
105
106
107
108
LIST OF FIGURES (1/11)
Figure No.
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