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參數(shù)資料
| 型號(hào)： | μPD784036 |
| 廠商： | NEC Corp. |
| 英文描述： | 8/16 Bit Single Chip Microcontrollers(8/16 位微控制器) |
| 中文描述： | 8 / 16位單片機(jī)微控制器（8 / 16位微控制器） |
| 文件頁(yè)數(shù)： | 39/98頁(yè) |
| 文件大?。?/td> | 650K |
| 代理商： | ΜPD784036 |
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39
μ
PD784035, 784036, 784037, 784038
8.6 A/D Converter
An analog/digital (A/D) converter having 8 multiplexed analog inputs (ANI0-ANI7) is incorporated.
The successive approximation system is used for conversion. The result of conversion is held in the 8-bit A/D
conversion result register (ADCR). Thus, speedy high-precision conversion can be achieved. (The conversion time
is about 7.5
μ
s at f
CLK
= 16 MHz.)
A/D conversion can be started in any of the following modes:
Hardware start: Conversion is started by means of trigger input (INTP5).
Software start : Conversion is started by means of bit setting the A/D converter mode register (ADM).
After conversion has started, one of the following modes can be selected:
Scan mode : Multiple analog inputs are selected sequentially to obtain conversion data from all pins.
Select mode: A single analog input is selected at all times to enable conversion data to be obtained
continuously.
ADM is used to specify the above modes, as well as the termination of conversion.
When the result of conversion is transferred to ADCR, an interrupt request (INTAD) is generated. Using this feature,
the results of conversion can be continuously transferred to memory by the macro service.
Figure 8-7. Block Diagram of A/D Converter
ANI0
ANI1
ANI2
ANI3
ANI4
ANI5
ANI6
ANI7
INTP5
AV
REF1
AV
SS
R/2
R
R/2
8
8
8
I
T
Sample-and-hold circuit
Voltage comparator
Successive conver-
sion register (SAR)
Series resistor string
Control
circuit
A/D converter mode
register (ADM)
A/D conversion
result register (ADCR)
Internal bus
Edge
detector
Conversion
trigger
Trigger enable
INTAD
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