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CHAPTER 8 APPLICATIONS OF SERIAL INTERFACE
Figure 8-13. Format of Serial Operating Mode Register 1
(
μ
PD78054, 78054Y, 78078, 78078Y, 78098, 780018, 780018Y, 780058, 780058Y,
78058F, 78058FY, 78075B, 78075BY, 78098B subseries,
μ
PD78070A, 78070AY)
CSIM
CSIM
11
Selects clock of serial interface channel 1
10
0
×
Clock externally input to SCK1 pin
Note 1
1
0
Output of 8-bit timer register 2 (TM2)
1
1
Clock specified by bits 4 through 7 of timer clock select register 3 (TCL3)
ATE
Selects operation mode of serial interface channel 1
0
3-wire serial I/O mode
1
3-wire serial I/O mode with automatic transfer/reception function
DIR
First bit
Function of SI1 pin
Function of SO1 pin
0
MSB
SI1/P20
SO1
1
LSB
(input)
(CMOS output)
CSIE CSIM PM20 P20 PM21 P21 PM22 P22
Operation of
Function of
SI1/P20 pin
Function of
SO1/P21 pin
Function of
SCK1/P22
1
11
shift register 1
0
×
Note 2 Note 2 Note 2 Note 2Note 2 Note 2
Stops
×
×
×
×
Clear
P20
P21
P22
operation
(CMOS I/O)
(CMOS I/O)
(CMOS I/O)
1
0
Note 3 Note 3
0
0
1
×
Enables
Count operation
SI1
Note 3
SO1
SCK1
1
×
operation
(input)
(CMOS output)
(input)
1
0
1
SCK1
(CMOS output)
Notes 1.
Clear bit 2 (STRB) and bit 1 (BUSY1) of the automatic data transfer/reception control register (ADTC)
to 0, 0 when the external clock input is selected by clearing CSIM11 to 0.
2.
These pins can be used as port pins.
3.
When only transmit is executed, this pin can be used as P20 (CMOS I/O). (Set bit 7 (RE) of the automatic
data transfer/reception control register (ADTC) to 0.)
Remark
×
: don’t care
PM
××
: Port mode register
P
××
: Output latch of port
Controls operation
of counter of
serial clock
×
×
7
CSIE
1
6
DIR
5
ATE
4
0
3
0
2
0
1
CSIM
11
0
CSIM
10
CSIM1
Symbol
FF68H
Address
At reset
R/W
00H
R/W