– ix –
LIST OF FIGURES (3/6)
Figure No.
Title
Page
7-15.
7-16.
External Event Counter Operation Timings..........................................................................
Timings after Compare Register Change during Timer Count Operation ...........................
147
148
8-1.
8-2.
8-3.
Watch Timer Block Diagram .................................................................................................
Timer Clock Select Register 2 Format .................................................................................
Watch Timer Mode Control Register Format .......................................................................
151
152
153
9-1.
9-2.
9-3.
Watchdog Timer Block Diagram...........................................................................................
Timer Clock Select Register 2 Format .................................................................................
Watchdog Timer Mode Register Format ..............................................................................
157
159
160
10-1.
10-2.
6-Bit Up/Down Counter Block Diagram ................................................................................
6-Bit Up/Down Counter Mode Register Format ...................................................................
163
165
11-1.
11-2.
11-3.
11-4.
Remote Controlled Output Application Example..................................................................
Clock Output Control Circuit Block Diagram ........................................................................
Timer Clock Select Register 0 Format .................................................................................
Port Mode Register 3 Format ...............................................................................................
167
168
169
170
12-1.
12-2.
12-3.
Buzzer Output Control Circuit Block Diagram ......................................................................
Timer Clock Select Register 2 Format .................................................................................
Port Mode Register 3 Format ...............................................................................................
171
173
174
13-1.
13-2.
13-3.
13-4.
13-5.
13-6.
13-7.
13-8.
13-9.
13-10.
13-11.
A/D Converter Block Diagram ..............................................................................................
A/D Converter Mode Register Format..................................................................................
A/D Converter Input Select Register Format........................................................................
A/D Converter Basic Operation ............................................................................................
Relation between Analog Input Voltage and A/D Conversion Result ..................................
A/D Conversion by Hardware Start ......................................................................................
A/D Conversion by Software Start........................................................................................
Example of Method of Reducing Current Consumption in Standby Mode ..........................
Analog Input Pin Disposition.................................................................................................
A/D Conversion End Interrupt Request Generation Timing.................................................
AV
DD
Pin Connection ............................................................................................................
176
179
180
182
183
184
185
186
187
188
188
14-1.
14-2.
14-3.
14-4.
14-5.
14-6.
14-7.
14-8.
Serial Interface Channel 0 Block Diagram ...........................................................................
Timer Clock Select Register 3 Format .................................................................................
Serial Operating Mode Register 0 Format ...........................................................................
Serial Bus Interface Control Register Format ......................................................................
Interrupt Timing Specify Register Format ............................................................................
3-Wire Serial I/O Mode Timings ...........................................................................................
RELT and CMDT Operations ...............................................................................................
Circuit of Switching in Transfer Bit Order .............................................................................
192
196
197
198
200
205
206
206