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11
TABLE OF CONTENTS
CHAPTER 1 GENERAL .........................................................................................................................23
1.1
Function Outline .....................................................................................................................24
1.2
Ordering Information ..............................................................................................................26
1.3
Differences among
μ
PD753208 Subseries Products...........................................................26
1.4
Block Diagram.........................................................................................................................27
1.5
Pin Configuration (Top View) .................................................................................................28
CHAPTER 2 PIN FUNCTIONS..............................................................................................................31
2.1
Pin Functions of
μ
PD753208..................................................................................................31
2.2
Pin Functions ..........................................................................................................................35
2.2.1
P00-P03 (PORT0), P10, P13 (PORT1) ...................................................................................... 35
2.2.2
P20-P23 (PORT2), P30-P33 (PORT3)
P50-P53 (PORT5), P60-P63 (PORT6)
P80-P83 (PORT8) and P90-P93 (PORT9) ................................................................................. 36
2.2.3
TI0 .............................................................................................................................................. 37
2.2.4
PTO0-PTO2................................................................................................................................ 37
2.2.5
PCL ............................................................................................................................................ 37
2.2.6
BUZ ............................................................................................................................................ 37
2.2.7
SCK, SO/SB0, and SI/SB1 ......................................................................................................... 37
2.2.8
INT4............................................................................................................................................ 38
2.2.9
INT0............................................................................................................................................ 38
2.2.10
KR0-KR3 .................................................................................................................................... 38
2.2.11
S12-S23...................................................................................................................................... 38
2.2.12
COM0-COM3.............................................................................................................................. 39
2.2.13
VLC0-VLC2 ................................................................................................................................ 39
2.2.14
BIAS ........................................................................................................................................... 39
2.2.15
LCDCL........................................................................................................................................ 39
2.2.16
SYNC.......................................................................................................................................... 39
2.2.17
X1 and X2................................................................................................................................... 39
2.2.18
RESET........................................................................................................................................ 40
2.2.19
MD0-MD3 (
μ
PD75P3216 only)................................................................................................... 40
2.2.20
D0-D7 (
μ
PD75P3216 only)......................................................................................................... 40
2.2.21
IC (
μ
PD753204, 753206, and 753208 only)............................................................................... 40
2.2.22
V
PP
(
μ
PD75P3216 only) ............................................................................................................. 40
2.2.23
V
DD
.............................................................................................................................................. 41
2.2.24
V
SS
.............................................................................................................................................. 41
2.3
Pin Input/Output Circuits .......................................................................................................42
2.4
Recommended Connections for Unused Pins.....................................................................45
CHAPTER 3 FEATURES OF ARCHITECTURE AND MEMORY MAP ............................................47
3.1
Bank Configuration and Addressing Mode of Data Memory ..............................................47