參數(shù)資料
型號(hào): μPD75P0116
廠商: NEC Corp.
英文描述: 4 Bit RISC Microcontrollers(4 位單片微控制器)
中文描述: 4位RISC微控制器(4位單片微控制器)
文件頁(yè)數(shù): 7/62頁(yè)
文件大?。?/td> 309K
代理商: ΜPD75P0116
m
PD75P0116
7
3. PIN FUNCTIONS
3.1 Port Pins
Pin name
I/O
Shared by
Function
8-bit
I/O
When
reset
I/O circuit
type
Note 1
P00
I
INT4
This is a 4-bit input port (PORT0).
For P01 to P03, on-chip pull-up resistor connections
are software-specifiable in 3-bit units.
Input
<B>
P01
I/O
SCK
<F>-A
P02
I/O
SO/SB0
<F>-B
P03
I/O
SI/SB1
<M>-C
P10
I
INT0
This is a 4-bit input port (PORT1).
On-chip pull-up resistor connections are software-
specifiable in 4-bit units.
P10/INT0 can select noise elimination circuit.
Input
<B>-C
P11
INT1
P12
INT2
P13
TI0
P20
I/O
PTO0
This is a 4-bit I/O port (PORT2).
On-chip pull-up resistor connections are software-
specifiable in 4-bit units.
Input
E-B
P21
PTO1
P22
PCL
P23
BUZ
P30
I/O
MD0
This is a programmable 4-bit I/O port (PORT3).
Input and output can be specified in single-bit
units. On-chip pull-up resistor connections are
software-specifiable in 4-bit units.
Input
E-B
P31
MD1
P32
MD2
P33
MD3
P40
Note 2
I/O
D0
This is an N-ch open-drain 4-bit I/O port (PORT4).
In the open-drain mode, withstands up to 13 V.
High-
impedance
M-E
P41
Note 2
D1
P42
Note 2
D2
P43
Note 2
D3
P50
Note 2
I/O
D4
This is an N-ch open-drain 4-bit I/O port (PORT5).
In the open-drain mode, withstands up to 13 V.
High-
impedance
M-E
P51
Note 2
D5
P52
Note 2
D6
P53
Note 2
D7
P60
I/O
KR0
This is a programmable 4-bit I/O port (PORT6).
Input and output can be specified in single-bit units.
On-chip pull-up resistor connections are software-
specifiable in 4-bit units.
Input
<F>-A
P61
KR1
P62
KR2
P63
KR3
P70
I/O
KR4
This is a 4-bit I/O port (PORT7).
On-chip pull-up resistor connections are software-
specifiable in 4-bit units.
Input
<F>-A
P71
KR5
P72
KR6
P73
KR7
P80
I/O
This is a 2-bit I/O port (PORT8).
On-chip pull-up resistor connections are software-
specifiable in 2-bit units.
Input
E-B
P81
Notes 1.
Circuit types enclosed in brackets indicate Schmitt triggered inputs.
2.
Low-level input current leakage increases when input instructions or bit manipulation instructions are executed.
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