
CHAPTER 3 FEATURES OF ARCHITECTURE AND MEMORY MAP
3 5
FLAG1
FLAG2
FLAG3
FLAG1
FLAG2
FLAG3
EQU
EQU
EQU
SEL
MOV
CLR1
OR1
XOR1
SET1
SKT
CLR1
30H.3
31H.0
32H.2
MB0
H, #FLAG1 SHR 6
CY
CY, @H+FLAG1
CY, @H+FLAG2
@H+FLAG3
CY
@H+FLAG3
;
;
;
;
;
;
CY
¨
0
CY
¨
CY FLAG1
CY
¨
CY FLAG2
FLAG3
¨
1
CY = 1
FLAG3
¨
0
(c) Special 1-bit direct addressing (@H+mem.bit)
This addressing mode enables bit manipulation in the entire memory space.
The higher 4 bits of the data memory address of the memory bank specified by MBE and MBS are indirectly
specified by the H register, and the lower 4 bits and the bit address are directly specified by the operand.
This addressing mode can be used to manipulate the respective bits of the entire data memory area in
various ways.
Example
To reset bit 2 (FLAG3) at address 32H if both bits 3 (FLAG1) at address 30H and bit 0 (FLAG2) at
address 31H are 0 or 1