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參數(shù)資料
| 型號(hào)： | μPD4264800 |
| 廠商： | NEC Corp. |
| 英文描述： | 64 M-Bit Dynamic RAM(64M 動(dòng)態(tài)RAM) |
| 中文描述： | 64 m位動(dòng)態(tài)隨機(jī)存儲(chǔ)器（RAM的6400動(dòng)態(tài)） |
| 文件頁數(shù)： | 8/28頁 |
| 文件大?。?/td> | 263K |
| 代理商： | ΜPD4264800 |
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μ
PD4264800, 4265800
8
[
μ
PD4265800]
Parameter
Symbol
Test condition
MIN.
MAX.
Unit
Notes
Operating current
I
CC1
RAS, CAS cycling
t
RAC
= 50 ns
135
mA
1, 2, 3
t
RC
= t
RC (MIN.)
, I
O
= 0 mA
t
RAC
= 60 ns
115
Standby current
I
CC2
RAS, CAS
≥
V
IH (MIN.)
, I
O
= 0 mA
1.0
mA
RAS, CAS
≥
V
CC
– 0.2 V, I
O
= 0 mA
0.5
RAS only refresh current
I
CC3
RAS cycling, CAS
≥
V
IH (MIN.)
t
RAC
= 50 ns
135
mA
1, 2, 3 ,4
t
RC
= t
RC (MIN.)
, I
O
= 0 mA
t
RAC
= 60 ns
115
Operating current
I
CC4
RAS
≤
V
IL (MAX.)
, CAS cycling
t
RAC
= 50 ns
85
mA
1, 2, 5
(Fast page mode)
t
PC
= t
PC (MIN.)
, I
O
= 0 mA
t
RAC
= 60 ns
75
CAS before RAS
I
CC5
RAS cycling
t
RAC
= 50 ns
135
mA
1, 2
refresh current
t
RC
= t
RC (MIN.)
, I
O
= 0 mA
t
RAC
= 60 ns
115
Input leakage current
I
I (L)
V
I
= 0 to 3.6 V
All other pins not under test = 0 V
–5
+5
μ
A
Output leakage current
I
O (L)
V
O
= 0 to 3.6 V
Output is disabled (Hi-Z)
–5
+5
μ
A
High level output voltage
V
OH
I
O
= –2.0 mA
2.4
V
Low level output voltage
V
OL
I
O
= +2.0 mA
0.4
V
Notes 1.
I
CC1
, I
CC3
, I
CC4
and I
CC5
depend on cycle rates (t
RC
and t
PC
).
2.
Specified values are obtained with outputs unloaded.
3.
I
CC1
and I
CC3
are measured assuming that address can be changed once or less during RAS
≤
V
IL (MAX.)
and CAS
≥
V
IH (MIN.)
.
4.
I
CC3
is measured assuming that all column address inputs are held at either high or low.
5.
I
CC4
is measured assuming that all column address inputs are switched only once during each fast page
cycle.
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