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參數(shù)資料
| 型號： | μ PD30101 |
| 廠商： | NEC Corp. |
| 英文描述： | 64-Bit RISC Microprocessor(64 位RISC微處理器) |
| 中文描述： | 64位RISC微處理器（64位的RISC微處理器） |
| 文件頁數(shù)： | 3/4頁 |
| 文件大?。?/td> | 92K |
| 代理商： | Μ PD30101 |
V
R
4101 MIPS RISC Microprocessor
3
Features
V
Watt at Microprocessor Forum, 1995)
R
4100 CPU core (awarded the best MIPS/
MIPS I, II, and III instruction sets without
FPU, LL, LLD, SC, and SCD
instructions
Five-stage pipeline running at 33 MHz
Single-cycle multiply-and-accumulate
(MAC) instruction for DSP operations
Memory management unit
32-bit physical addressing range of 4 GB
with 40-bit virtual address space
32 double-entry TLBs support 1-256K
page size
Supports up to 8 MB DRAM and 16 MB
Cache memory unit
2K direct-mapped instruction cache
1K data cache with write-back for
reducing store operations
Bus control unit
Supports 8-/16-bit external devices
Supports subset of ISA bus
Power management unit
200-mW full-speed typical power
30-mW standby power
10-mW suspend power
240-
m
W hibernate power
Clock generator unit
Built-in PLL for frequency multiplication
External bus frequency of 16/33 MHz
All clocks generated from a single
external 32-kHz crystal
Real-time clock with built-in timers
Interrupt control unit: supports both internal
and external interrupts
DMA address unit and DMA control unit:
controls five different DMA channels
General-purpose I/O unit: controls 12
GPIO pins
Keyboard (64-key) and touch-panel interface
Serial interface unit
Complies with RS-232C specification
Supports up to 115 Kb/s with separate
debug serial port
Infrared unit: performs 0.5 to 115 Kb/s IrDA
1.1 standard communication
Audio interface unit: uses PWM to produce
audio output
AC/DC specifications
33-MHz maximum frequency
3.0-3.6 V operation
200-mW typical power consumption
Ordering Information
Part Number
Package
m
PD30101GM-33-8ED
160-pin LQFP
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