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XRT72L52
324
TWO CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
REV. 1.0.3
NOTE: Prior to reading in the PMDL Message from the Receive LAPD Message buffer, the user is urged to read the state
of the RxLAPDType[1:0] bit-fields in order to determine the size of this message.
5. Inform the Local Microprocessor/External Circuitry of the receipt of the new LAPD Message frame.
Finally, after the LAPD Receiver has received and processed the newly received LAPD Message frame (per
steps 1 through 4, as described above), it will inform the local Microprocessor that a LAPD Message frame has
been received and is ready for user-system handling. The LAPD Receiver will inform the Microprocessor/
Microcontroller and the external circuitry by:
Generating a LAPD Message Frame Received interrupt to the Microprocessor. The purpose of this interrupt
is to let the Microprocessor know that the Receive LAPD Message buffer contains a new PMDL Message
that needs to be read and processed. When the LAPD Receiver generates this interrupt, it will set bit 0
(RxLAPD Interrupt Status) within the Rx E3 LAPD Control Register to “1” as depicted below.
)
Setting Bit 1 (End of Message) within the Rx E3 LAPD Status Register, to “1” as depicted below.
In summary, Figure 130 presents a flow chart depicting how the LAPD Receiver functions.
RXE3 LAPD CONTROL REGISTER (ADDRESS = 0X18
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
Not Used
RxLAPD
Enable
RxLAPD
Interrupt Enable
RxLAPD
Interrupt Status
RO
R/W
RUR
0
1
RXE3 LAPD STATUS REGISTER (ADDRESS = 0X19)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
Not Used
RxABORT
RxLAPDType[1:0]
RxCR
Type
RxFCS
Error
End of
Message
Flag
Present
RO
0
1
0