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參數(shù)資料
| 型號(hào)： | XC18V01SO20C |
| 廠商： | XILINX INC |
| 元件分類： | DRAM |
| 英文描述： | In-System Programmable Configuration PROMs |
| 中文描述： | 128K X 8 CONFIGURATION MEMORY, 15 ns, PDSO20 |
| 封裝： | SOIC-20 |
| 文件頁數(shù)： | 8/21頁 |
| 文件大小： | 230K |
| 代理商： | XC18V01SO20C |
R
Table 5
lists the IDCODE register values for the XC18V00
devices.
The USERCODE instruction gives access to a 32-bit user
programmable scratch pad typically used to supply informa-
tion about the device
’
s programmed contents. By using the
USERCODE instruction, a user-programmable identifica-
tion code can be shifted out for examination. This code is
loaded into the USERCODE register during programming of
the XC18V00 device. If the device is blank or was not
loaded during programming, the USERCODE register con-
tains FFFFFFFFh.
XC18V00 TAP Characteristics
The XC18V00 family performs both in-system programming
and IEEE 1149.1 boundary-scan (JTAG) testing via a single
4-wire Test Access Port (TAP). This simplifies system
designs and allows standard Automatic Test Equipment to
perform both functions. The AC characteristics of the
XC18V00 TAP are described as follows.
TAP Timing
Figure 4
shows the timing relationships of the TAP signals.
These TAP timing characteristics are identical for both
boundary-scan and ISP operations.
TAP AC Parameters
Table 6
shows the timing parameters for the TAP waveforms shown in
Figure 4
.
Table 6:
Test Access Port Timing Parameters
Table 5:
IDCODES Assigned to XC18V00 Devices
ISP-PROM
IDCODE
XC18V01
05024093h or 05034093h
XC18V02
05025093h or 05035093h
XC18V04
05026093h or 05036093h
XC18V512
05023093h or 05033093h
Figure 4:
Test Access Port Timing
Symbol
Parameter
Min
Max
Units
T
CKMIN1
T
CKMIN2
T
MSS
T
MSH
T
DIS
T
DIH
T
DOV
TCK minimum clock period
100
-
ns
TCK minimum clock period, Bypass Mode
50
-
ns
TMS setup time
10
-
ns
TMS hold time
25
-
ns
TDI setup time
10
-
ns
TDI hold time
25
-
ns
TDO valid delay
-
25
ns
TCK
T
CKMIN1,2
T
MSS
TMS
TDI
TDO
T
MSH
T
DIH
T
DOV
T
DIS
DS026_04_032702
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XC18V01SO20C0100 | 制造商:Xilinx 功能描述: |
| XC18V01SO20C0799 | 制造商:Xilinx 功能描述: |
| XC18V01SO20C0901 | 制造商:Xilinx 功能描述: |
| XC18V01SO20C0936 | 制造商:Xilinx 功能描述:XLXXC18V01SO20C0936 IC SYSTEM GATE |
| XC18V01SO20I | 功能描述:IC PROM SER I-TEMP 3.3V 20-SOIC RoHS:否 類別:集成電路 (IC) >> 存儲(chǔ)器 - 用于 FPGA 的配置 Proms 系列:- 產(chǎn)品變化通告:Product Discontinuation 28/Jul/2010 標(biāo)準(zhǔn)包裝:98 系列:- 可編程類型:OTP 存儲(chǔ)容量:300kb 電源電壓:3 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 封裝/外殼:8-SOIC（0.154"，3.90mm 寬） 供應(yīng)商設(shè)備封裝:8-TSOP 包裝:管件 |
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