參數資料
型號: SYS82000RKXCLI-10
元件分類: SRAM
英文描述: 2M X 8 MULTI DEVICE SRAM MODULE, 100 ns, PSMA38
封裝: PLASTIC, MODULE, SIP-38
文件頁數: 5/7頁
文件大?。?/td> 478K
代理商: SYS82000RKXCLI-10
SYS82000RKXC - 70/85/10/12
ISSUE 1.2 January 1999
5
Read Cycle Timing Waveform (1,2)
Write Cycle No.1 Timing Waveform(1,4)
tWR(7)
AS(6)
t
CW
t
WP(2)
t
DW
DH
AW
Don't
Care
t
WC
OHZ(3,9)
Address
OE
CS
WE
Dout
Din
High-Z
OW
t
(8)
Data Valid
OE
t
ACS
t
CLZ (4,5)
t
OHZ (3)
t
OLZ
AA
OH
CHZ (3,4,5)
Data Valid
t
RC
Address
CS
Dout
OE
Don't
care.
AC Read Characteristics Notes
(1) WE is High for Read Cycle.
(2) All read cycle timing is referenced from the last valid address to the first transition address.
(3) tCHZ and tOHZ are defined as the time at which the outputs achieve open circuit conditions and are
not referenced to output voltage levels.
(4) At any given temperature and voltage condition, tCHZ (max) is less than tCLZ (min) both for a given module
and from module to module.
(5) These parameters are sampled and not 100% tested.
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