參數(shù)資料
型號(hào)： STK11C88-3N55
廠商： Electronic Theatre Controls, Inc.
英文描述： 32K X 8 NVSRAM 3.3 V QUANTUM TRAP CMOS NONVOLATILE STATIC RAM
中文描述： 32K的× 8非易失性SRAM 3.3伏量子端粒酶的CMOS非易失靜態(tài)RAM
文件頁數(shù)： 2/9頁
文件大?。?/td> 90K
代理商： STK11C88-3N55
STK11C88-3
July 1999
5-12
ABSOLUTE MAXIMUM RATINGS
a
Voltage on Input Relative to V
SS
. . . . . . . . . . –0.6V to (V
CC
+ 0.5V)
Voltage on DQ
0-7
. . . . . . . . . . . . . . . . . . . . . . –0.5V to (V
CC
+ 0.5V)
Temperature under Bias . . . . . . . . . . . . . . . . . . . . . –55
°
C to 125
°
C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . –65
°
C to 150
°
C
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1W
DC Output Current (1 output at a time, 1s duration). . . . . . . .15mA
DC CHARACTERISTICS
(V
CC
= 3.0V-3.6V)
Note b:
Note c:
Note d:
I
CC1
and I
are dependent on output loading and cycle rate. The specified values are obtained with outputs unloaded.
I
CC2
is the average current required for the duration of the
STORE
cycle (t
).
E
V
IH
will not produce standby current levels until any nonvolatile cycle in progress has timed out.
AC TEST CONDITIONS
CAPACITANCE
e
(T
A
= 25
°
C, f = 1.0MHz)
Note e:
These parameters are guaranteed but not tested.
SYMBOL
PARAMETER
COMMERCIAL
INDUSTRIAL
UNITS
NOTES
MIN
MAX
MIN
MAX
I
CC1
b
Average V
CC
Current
35
30
37
32
mA
mA
t
AVAV
= 45ns
t
AVAV
= 55ns
I
CC2
I
CC3
c
Average V
CC
Current During
STORE
3
3
mA
All Inputs Don
’
t Care, V
CC
= max
b
Average V
CC
Current at t
AVAV
= 200ns
3.3V, 25
°
C, Typical
8
8
mA
W
≥
(V
CC
–
0.2V)
All Others Cycling, CMOS Levels
I
SB1
d
Average
V
CC
Current
(Standby, Cycling TTL Input Levels)
9
8
10
9
mA
mA
t
AVAV
= 45ns, E
≥
V
IH
t
AVAV
= 55ns, E
≥
V
IH
I
SB2
d
V
CC
Standby Current
(Standby, Stable CMOS Input Levels)
1
1
mA
E
≥
(V
CC
- 0.2V)
All Others V
IN
≤
0.2V or
≥
(V
CC
–
0.2V)
I
ILK
Input Leakage Current
±
1
±
1
μ
A
V
CC
= max
V
IN
= V
SS
to V
CC
I
OLK
Off-State Output Leakage Current
±
5
±
5
μ
A
V
CC
= max
V
IN
= V
SS
to V
CC
, E or G
≥
V
IH
V
IH
Input Logic
“
1
”
Voltage
2.2
V
CC
+ .5
2.2
V
CC
+ .5
V
All Inputs
V
IL
Input Logic
“
0
”
Voltage
V
SS
–
.5
0.8
V
SS
–
.5
0.8
V
All Inputs
V
OH
Output Logic
“
1
”
Voltage
2.4
2.4
V
I
OUT
=
–
1mA
V
OL
Output Logic
“
0
”
Voltage
0.4
0.4
V
I
OUT
= 2mA
T
A
Operating Temperature
0
70
–
40
85
°
C
Input Pulse Levels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0V to 3.0V
Input Rise and Fall Times
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ≤
5ns
Input and Output Timing Reference Levels . . . . . . . . . . . . . . . 1.5V
Output Load. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .See Figure 1
SYMBOL
PARAMETER
MAX
UNITS
CONDITIONS
C
IN
Input Capacitance
5
pF
V = 0 to 3V
C
OUT
Output Capacitance
7
pF
V = 0 to 3V
Figure 1: AC Output Loading
1.1KOhms
30 pF
INCLUDING
SCOPE AND
FIXTURE
1.55KOhms
3.0V
OUTPUT
Note a:
Stresses greater than those listed under
“
Absolute Maximum
Ratings
”
may cause permanent damage to the device. This is a
stress rating only, and functional operation of the device at condi-
tions above those indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rat-
ing conditions for extended periods may affect reliability.
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