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Samsung ASIC
5-99
STD150
SRFRAMBW_HD
High-Density Multi-Port Synchronous Register File with Bit-Write
Pin Descriptions
Pin Capacitance
Unit: [SL]
Name
I/O
Description
WCK<nw-1>
Write Clock
Write Clock input on each write port. WEN, WA[] and DI[] are latched into the
RAM on the rising edge of WCK. If WEN is low on the rising edge of WCK, the
RAM is in write mode. If WEN is high on the rising edge of CK, the RAM is in
write standby mode.
Write Enable input on each write port. WEN is latched into the RAM on the rising
edge of WCK.When WEN is low, the write mode is enabled. When WEN is high,
it prevents the write-operation. It is called “write standby mode”.
Write Address bus on each write port. It specifies the location in which the data
will be written in the write-operation. WA[] is latched at the rising edge of WCK.
Bit-write enable input bus. The bit-write enable is latched into the RAM on the ris-
ing of WCK. Each bit of BWEN[] enables and disables the write operation of cor-
responding data bit. BWEN[i] corresponds to DI[i] in bit-write. If WEN and
BWEN[0] are low and BWEN[1] is high, DI[0] is written into the memory location
specified on WA[], but DI[1] is not written.
Data Input bus on each write port. It contains data values to be written into the
memory during the write-cycle. DI[] is latched at the rising edge of WCK.
Read Clock input on each read port. REN and RA[] are latched into the RAM on
the rising edge of RCK. If REN is low on the rising edge of RCK, the RAM is in
read mode. If REN is high on the rising edge of RCK, the RAM is in read standby
mode.
Read Enable input on each read port. REN is latched into the RAM on the rising
edge of RCK. When REN is low, read is enabled. When REN is high, read is dis-
abled and DOUT[] remains in the previous state. It is called “read standby mode”
Output Enable input on each read port. The low state enables output drivers and
the high state disables output to go to the Hi-Z state.
Read Address bus on each read port. It specifies the location to be read in the
read-operation. RA[] is latched at the rising edge of RCK.
Data Output bus on each read port. When REN and OEN are low, it presents the
data word stored in the location specified by RA[] after the rising edge of RCK.
When REN is high and OEN is low, DOUT[] remains in the previous state. When
OEN is high, DOUT[] is in the high-impedance state regardless of REN.
WEN<nw-1>
Write Enable
WA<nw-1>[]
Write Address
BWEN<nw-1>[]
Bit Write
Enable
DI<nw-1>[]
Data Input
RCK<nr-1>
Read Clock
REN<nr-1>
Read Enable
OEN<nr-1>
Data Output
Enable
Read Address
RA<nr-1>[]
DOUT<nr-1>[]
WCK
5.84
WEN
2.46
WA
2.46
DI
2.46
BWEN
2.46
RCK
5.84
REN
2.46
OEN
6.00
RA
2.46
DOUT
16.94