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1.4 Product Family
Introduction
STD110
1-12
SEC ASIC
1.4.2 INTERNAL MACROCELLS
Internal Macrocells are the lowest level of logic functions such as NAND, NOR
and flip-flop used for logic designs. There are about 471 different types of
internal macrocells. They usually come in four levels of drive strength (0.5X, 1X,
2X and 4X).
These macrocells have many levels of representations—logic symbol, logic
model, timing model, transistor schematic, HSPICE netlist, physical layout, and
placement and routing model.
1.4.3 COMPILED MACROCELLS
Compiled macrocells of STD110 consist of compiled memory and compiled
datapath macrocells.
1.4.3.1 Compiled Memory Macrocells
Memories in STD110 are fully user-configurable and are provided as a compiler.
Two different types of memories are available in STD110. One is suitable for high-
density application with high-performance, called STD110-HD compiled memory.
The other is suitable for low-power application, called STD110-LP compiled
memory.
In STD110-HD compiled memory, eight types of memories are available such as
single-port synchronous/asynchronous static RAM, dual-port synchronous static
RAM, synchronous diffusion/metal-programmable ROM, multi-port
asynchronous register file and synchronous first-in first-out memory.
Synchronous memories have a fully synchronous operation at the rising-edge of
clock and the duty-free cycle is available. Also, the bit-write capability is available.
Asynchronous memories have a synchronous operation for a write enable signal
during write mode and have an asynchronous operation for address signal during
read mode. Multi-port asynchronous register file supports four kinds of
configurations such as 2 port(1-read/1-write), 3 port(1-read/2-write and 2-read/1-
write) and 4 port (2-read/2-write). The first-in first-out memory which is widely
used in communication buffering types of applications has also fully synchronous
operation at the rising- edge of clock.
On the other hand, in STD110-LP compiled memory, five types of memories are
available such as single-port synchronous/asynchronous static RAM, dual-port
synchronous static RAM and synchronous diffusion/metal-programmable ROM.
Synchronous memories are almost same as that of STD110-HD except that the
duty-free cycle is not available. Asynchronous memory is same as that of
STD110-HD.
To dramatically reduce the power consumption in STD110-LP, some of low-
power techniques such as a partial activation architecture in cell array and a
divided word-line structure was adopted, rather than STD110-HD.
Basically in STD110-HD and STD110-LP, the power-down mode which
significantly reduces the power dissipated during a read or write mode is
provided. Also compiled memories have a standby mode except multi-port
asynchronous register file and first-in first-out memory. While in standby mode,
the data stored in the memory is retained, data outputs remain stable and the
power is greatly reduced because memory operation is internally blocked while
the memory contents and the data outputs are unaffected.