參數(shù)資料
型號(hào)： ST90135M5LVT6
英文描述： 8/16-BIT MICROCONTROLLER (MCU) WITH 16 TO 64K ROM. OTP OR EPROM. 512 TO 2K RAM - ST9 %2B FAMILY
中文描述： 8/16至64K ROM的16位微控制器（MCU）。 OTP或EPROM。 512到2K的RAM - ST9%2B系列
文件頁(yè)數(shù)： 63/199頁(yè)
文件大?。?/td> 2813K
代理商： ST90135M5LVT6
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ST90158 - ON-CHIP DIRECT MEMORY ACCESS (DMA)
5.3 DMA TRANSACTIONS
The purpose of an on-chip DMA channel is to
transfer a block of data between a peripheral and
the Register File, or Memory. Each DMA transfer
consists of three operations:
– A load from/to the peripheral data register to/
from a location of Register File (or Memory) ad-
dressed through the DMA Address Register (or
Register pair)
– A post-increment of the DMA Address Register
(or Register pair)
– A post-decrement of the DMA transaction coun-
ter, which contains the number of transactions
that have still to be performed.
If the DMA transaction is carried out between
the
peripheral and the Register File
(
Figure 29
), one
register is required to hold the DMA Address, and
one to hold the DMA transaction counter. These
two registers must be located in the Register File:
the DMA Address Register in the even address
register, and the DMA Transaction Counter in the
next register (odd address). They are pointed to by
the DMA Transaction Counter Pointer Register
(DCPR), located in the peripheral’s paged regis-
ters. In order to select a DMA transaction with the
Register File, the control bit DCPR.RM (bit 0 of
DCPR) must be set.
If the transaction is made between
the peripheral
and Memory
, a register pair (16 bits) is required
for the DMA Address and the DMA Transaction
Counter (
Figure 30
). Thus, two register pairs must
be located in the Register File.
The DMA Transaction Counter is pointed to by the
DMA Transaction Counter Pointer Register
(DCPR), the DMA Address is pointed to by the
DMA Address Pointer Register (DAPR),both
DCPR and DAPR are located in the paged regis-
ters of the peripheral.
Figure 29. DMA Between Register File and Peripheral
IDCR
IVR
DAPR
DCPR
DATA
PAGED
REGISTERS
REGISTERS
SYSTEM
DMA
COUNTER
DMA
ADDRESS
FFh
F0h
EFh
E0h
DFh
MEMORY
0000h
DATA
ALREADY
TRANSFERRED
END OF BLOCK
INTERRUPT
SERVICE ROUTINE
DMA
TABLE
D
ISR ADDRESS
0100h
VECTOR
TABLE
REGISTER FILE
PERIPHERAL
PAGED REGISTERS
9
相關(guān)PDF資料
PDF描述
ST90135M5T6 8-BIT MICROCONTROLLER
ST90135M6 8/16-BIT MCU FAMILY WITH UP TO 64K ROM/OTP/EPROM AND UP TO 2K RAM
ST90135M6LVT6 8/16-BIT MICROCONTROLLER (MCU) WITH 16 TO 64K ROM. OTP OR EPROM. 512 TO 2K RAM - ST9 %2B FAMILY
ST90158M7 8/16-BIT MICROCONTROLLER (MCU) WITH 16 TO 64K ROM. OTP OR EPROM. 512 TO 2K RAM - ST9 + FAMILY
ST90158M7LVT6 8/16-BIT MICROCONTROLLER (MCU) WITH 16 TO 64K ROM. OTP OR EPROM. 512 TO 2K RAM - ST9 + FAMILY
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ST90135M5Q6 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:8/16-BIT MCU FAMILY WITH UP TO 64K ROM/OTP/EPROM AND UP TO 2K RAM
ST90135M5T6 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller
ST90135M6 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8/16-BIT MICROCONTROLLER (MCU) WITH 16 TO 64K ROM. OTP OR EPROM. 512 TO 2K RAM - ST9 + FAMILY
ST90135M6LVT6 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8/16-BIT MICROCONTROLLER (MCU) WITH 16 TO 64K ROM. OTP OR EPROM. 512 TO 2K RAM - ST9 + FAMILY
ST90135M6Q6 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:8/16-BIT MCU FAMILY WITH UP TO 64K ROM/OTP/EPROM AND UP TO 2K RAM
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