參數(shù)資料
型號： ST72171
英文描述： 8-BIT MCU WITH 8K FLASH. ADC. WDG. SPI. SCI. TIMERS SPGAS (SOFTWARE PROGRAMMABLE GAIN AMPLIFIERS). OP-AMP
中文描述： 8位8K閃存微控制器。 ADC的。水分散粒劑。的SPI。脊髓損傷。定時器SPGAS（軟件可編程增益放大器）。運放
文件頁數(shù)： 6/93頁
文件大?。?/td> 915K
代理商： ST72171
6/93
ST72E121 ST72T121
Table 1. ST72T121Jx Pin Description
Note 1: V
PP
on EPROM/OTP only.
Pin n°
QFP44
Pin n°
SDIP42
Pin Name
Type
Description
Remarks
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
PE1/RDI
PB0
PB1
PB2
PB3
PB4
PD0
PD1
PD2
PD3
PD4
PD5
V
DD_3
V
SS_3
PF0/CLKOUT
PF1
PF2
PF4/OCMP1_A
PF6/ICAP1_A
PF7/EXTCLK_A
V
DD_0
V
SS_0
PC0/OCMP2_B
PC1/OCMP1_B
PC2/ICAP2_B
PC3/ICAP1_B
PC4/MISO
PC5/MOSI
PC6/SCK
PC7/SS
PA3
V
DD_1
V
SS_1
PA4
PA5
PA6
PA7
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
S
S
I/O
I/O
I/O
I/O
I/O
I/O
S
S
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
S
S
I/O
I/O
I/O
I/O
Port E1 or SCI Receive Data In
Port B0
Port B1
Port B2
Port B3
Port B4
Port D0
Port D1
Port D2
Port D3
Port D4
Port D5
Main Power Supply
Ground
Port F0 or CPU Clock Output
Port F1
Port F2
Port F4 or Timer A Output Compare 1
Port F6 or Timer A Input Capture 1
Port F7 or External Clock on Timer A
Main power supply
Ground
Port C0 or Timer B Output Compare 2
Port C1 or Timer B Output Compare 1
Port C2 or Timer B Input Capture 2
Port C3 or Timer B Input Capture 1
Port C4 or SPI Master In / Slave Out Data
Port C5 or SPI Master Out / Slave In Data
Port C6 or SPI Serial Clock
Port C7 or SPI Slave Select
Port A3
Main power supply
Ground
Port A4
Port A5
Port A6
Port A7
Test mode pin. In the EPROM programming
mode, this pin acts as the programming voltage
input V
PP.
Bidirectional. Active low. Top priority non maskable interrupt.
Ground
External Interrupt: EI2
External Interrupt: EI2
External Interrupt: EI2
External Interrupt: EI2
External Interrupt: EI3
External Interrupt: EI1
External Interrupt: EI1
External Interrupt: EI1
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
External Interrupt: EI0
High Sink
High Sink
High Sink
High Sink
38
31
TEST/V
PP1)
S
This pin must be tied low
in user mode
39
40
41
42
43
44
32
33
34
35
36
37
RESET
V
SS_2
OSCOUT
OSCIN
V
DD_2
PE0/TDO
I/O
S
O
I
S
I/O
Input/Output Oscillator pin. These pins connect a parallel-resonant crystal, or
an external source to the on-chip oscillator.
Main power supply
Port E0 or SCI Transmit Data Out
6
相關PDF資料
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