參數(shù)資料
型號: ST62T94B8
英文描述: Telecommunication IC
中文描述: 通信集成電路
文件頁數(shù): 27/82頁
文件大?。?/td> 870K
代理商: ST62T94B8
27/82
ST62T18C/E18C
DIGITAL WATCHDOG
(Cont’d)
These instructions test the C bit and Reset the
MCU (i.e. disable the Watchdog) if the bit is set
(i.e. if the Watchdog is active), thus disabling the
Watchdog.
In all modes, a minimum of 28 instructions are ex-
ecuted after activation, before the Watchdog can
generate a Reset. Consequently, user software
should load the watchdog counter within the first
27 instructions following Watchdog activation
(software mode), or within the first 27 instructions
executed following a Reset (hardware activation).
It should be noted that when the GEN bit is low (in-
terrupts disabled), the NMI interrupt is active but
cannot cause a wake up from STOP/WAIT modes.
Figure 18. A typical circuit making use of the
EXERNAL STOP MODE CONTROL feature
Figure 19. Digital Watchdog Block Diagram
NMI
SWITCH
I/O
VR02002
RSFF
8
DATA BUS
VA00010
-2
-12
OSCILLATOR
CLOCK
RESET
WRITE
RESET
DB0
R
S
Q
DB1.7
SET
LOAD
7
8
-2
SET
27
相關(guān)PDF資料
PDF描述
ST62T94M8 Telecommunication IC
ST6228C 8-BIT MICROCONTROLLER ( MCU ) WITH OTP. ROM. FASTR A/D CONVERTER. 8-BIT AUTO-RELOAD TIMER. UART. OSG. SAFE RESET AND 28 PINS
ST62E28CF1 8-BIT MICROCONTROLLER ( MCU ) WITH OTP. ROM. FASTR A/D CONVERTER. 8-BIT AUTO-RELOAD TIMER. UART. OSG. SAFE RESET AND 28 PINS
ST62P28CB1 8-BIT MICROCONTROLLER ( MCU ) WITH OTP. ROM. FASTR A/D CONVERTER. 8-BIT AUTO-RELOAD TIMER. UART. OSG. SAFE RESET AND 28 PINS
ST62P28CB3 8-BIT MICROCONTROLLER ( MCU ) WITH OTP. ROM. FASTR A/D CONVERTER. 8-BIT AUTO-RELOAD TIMER. UART. OSG. SAFE RESET AND 28 PINS
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