參數(shù)資料
型號(hào)： ST62T65CN6
英文描述： IC-SM-8-BIT MCU 4K OTP
中文描述： 集成電路釤8位微控制器4K的檢察官辦公室
文件頁(yè)數(shù)： 60/82頁(yè)
文件大?。?/td> 870K
代理商： ST62T65CN6
60/82
ST62T18C/E18C
INSTRUCTION SET
(Cont’d)
Conditional Branch
. The branch instructions
achieve a branch in the program when the select-
ed condition is met.
Bit Manipulation Instructions
. These instruc-
tions can handle any bit in data space memory.
One group either sets or clears. The other group
(see Conditional Branch) performs the bit test
branch operations.
Table 22. Conditional Branch Instructions
Control Instructions
. The control instructions
control the MCU operations during program exe-
cution.
Jump and Call.
These two instructions are used
to perform long (12-bit) jumps or subroutines call
inside the whole program space.
Notes
:
b.
e.
ee.
Table 23. Bit Manipulation Instructions
3-bit address
5 bit signed displacement in the range -15 to +16<F128M>
8 bit signed displacement in the range -126 to +129
rr. Data space register
. Affected. The tested bit is shifted into carry.
* . Not Affected
Notes:
b.
rr.
3-bit address;
Data space register;
* . Not<M> Affected
Table 24. Control Instructions
Notes:
1.
.
*.
This instruction is deactivated<N>and a WAIT is automatically executed instead of a STOP if the watchdog function is selected.
Affected
Not Affected
Table 25. Jump & Call Instructions
Instruction
Notes:
abc. 12-bit address;
* .
Not Affected
Instruction
Branch If
Bytes
Cycles
Flags
Z
*
*
*
*
*
*
C
*
*
*
*
JRC e
JRNC e
JRZ e
JRNZ e
JRR b, rr, ee
JRS b, rr, ee
C = 1
C = 0
Z = 1
Z = 0
Bit = 0
Bit = 1
1
1
1
1
3
3
2
2
2
2
5
5
Instruction
Addressing Mode
Bytes
Cycles
Flags
Z
*
*
C
*
*
SET b,rr
RES b,rr
Bit Direct
Bit Direct
2
2
4
4
Instruction
Addressing Mode
Bytes
Cycles
Flags
Z
*
*
*
*
C
*
*
*
*
NOP
RET
RETI
STOP (1)
WAIT
Inherent
Inherent
Inherent
Inherent
Inherent
1
1
1
1
1
2
2
2
2
2
Addressing Mode
Bytes
Cycles
Flags
Z
*
*
C
*
*
CALL abc
JP abc
Extended
Extended
2
2
4
4
60
相關(guān)PDF資料
PDF描述
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