參數(shù)資料
型號(hào): ST62T42BQ6
英文描述: 8-BIT MICROCONTROLLER ( MCU ) WITH OTP. ROM. FASTROM. EPROM. LCD DRIVER. EEPROM. A/D CONVERTER AND 64 PINS
中文描述: 8位微控制器(MCU)的與檢察官辦公室。光盤。 FASTROM。存儲(chǔ)器。液晶顯示驅(qū)動(dòng)程序。 EEPROM中。的A / D轉(zhuǎn)換器和64個(gè)
文件頁數(shù): 52/74頁
文件大?。?/td> 733K
代理商: ST62T42BQ6
52/74
ST62T46B/E46B
4.6 POWERSUPPLY SUPERVISOR DEVICE (PSS)
The Power Supply Supervisor device, described in
the
Figure 31
, permits supervising the crossing of
the PSS pin voltage (VPSS) through a program-
mable voltage (mxV
DD
/n), where n and m can be
chosen by software. This device includes:
– An internal comparator which is connected to the
internal INT line to make an interrupt request to
the Core.
– 2 resistive voltage dividers that are, respectively,
supplied by the PSS pin and the V
DD
pin. These
two voltage dividers are both connected to the
two inputs of the internal comparator. They con-
sist of 13 identical resistors. It is possible to se-
lect by software 5 voltage rates on the PSS
divider (nxVPSS/13) and 4 voltage rates on the
V
DD
divider (mxV
DD
/13). The n and m values can
be chosen by software. These two voltage divid-
ers are disconnected in STOP mode, and when
the PSS device is OFF.
– An internal device that allows the detection with
an hysteresis of V
DD
/13.
The PSS device is supplied by an internal connec-
tion to V
DD
supply. The following paragraphs de-
scribe the operating mode of the PSS device and
the PSS register that permits control over the PSS
device. The PSS device is switched off as soon as
the Core executes the STOP instruction, but con-
tinues to work in the WAIT mode.
Figure 30. PSS Device Operating Modes
Description
Figure 31. PSS Device Block Diagram
VPSS
t
(m+1)x/V
DD
/13
mx/V
DD
/13
PIF
1
0
t
nxVPSS/13
VR02044A
PSS
V
DD
PSS ON
INTERRUPT LINE
PIF
2k
(UP to 13 STEPS)
2k
(UP to 13 STEPS)
SEQUENCER
& LOGIC
SYNCHRO
+
-
VA0060
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