參數(shù)資料
型號(hào): ST52F514Y3M6
英文描述: IC MAX 7000 CPLD 256 144-TQFP
中文描述: 微控制器
文件頁數(shù): 53/106頁
文件大小: 648K
代理商: ST52F514Y3M6
ST52F510/F513/F514
53/106
Port C Data Direction Register (PORT_C_DDR)
Configuration Register 34 (022h) Read/Write
Reset Value: 0000 0000 (00h)
Note:
This register is not used in 16/20 pin devices
Bit 7-6: Not Used
Bit 5-0:
DDRC5-0
Port C direction (see Table 7.1)
0: Port C pin configured as input
1: Port C pin configured as output
Note:
in order to achieve low current consuption,
the port pins must be configured as input pull-up,
even though they are not existing in the package.
For example in 20 pin devices, the pins PB6-7 and
PC0-7 must be configured in input pull-up.
7.6.2 Input Registers.
Port A Data Input Register (PORT_A_IN)
Input Register 0 (00h) Read only
Reset Value: XXXX XXXX
Bit 7-0:
PAI7-0
Port A Input data
The logical level applied in the Port A pins,
configured as digital input, can be achieved by
reading this register.
Port B Data Input Register (PORT_B_IN)
Input Register 1 (01h) Read only
Reset Value: XXXX XXXX
(*) Not used in 20 pin packagedevices
(**)Not usedin 16 pin package devices
Bit 7-0:
PBI7-0
Port B Input data
The logical level applied in the Port B pins,
configured as digital input, can be achieved by
reading this register.
Port C Data Input Register (PORT_C_IN)
Input Register 2 (02h) Read only
Reset Value: XXXX XXXX
Note:
This register is not used in16/20 pin devices
Bit 7-6: Not Used
Bit 5-0:
PCI5-0
Port C Input data
The logical level applied in the Port C pins,
configured as digital input, can be achieved by
reading this register.
7.6.3 Output Registers.
Port A Data Output Register (PORT_A_OUT)
Output Register 0 (00h) Write only
Reset Value: 0000 0000 (00h)
Bit 7-0:
PAO7-0
Port A Output data
The logical values written in these register bits are
put in the Port A pins configured as digital output.
Port B Data Output Register (PORT_B_OUT)
Output Register 1 (01h) Write only
Reset Value: 0000 0000 (00h)
(*) Not used in 20 pin package devices
(**) Not usedin 16 pin package devices
Bit 7-0:
PBO7-0
Port B Input data
7
0
-
-
DDRC5
DDRC4
DDRC3
DDRC2
DDRC1
DDRC0
7
0
PAI7
PAI6
PAI5
PAI4
PAI3
PAI2
PAI1
PAI0
7
0
P
BI
7*
PBI6*
PBI5**
PBI4**
PBI3**
PBI2**
PBI1
PBI0
7
0
-
-
PCI5
PCI4
PCI3
PCI2
PCI1
PCI0
7
0
PAO7
PAO6
PAO5
PAO4
PAO3
PAO2
PAO1
PAO0
7
0
P
BO
7*
PBO6*
PBO5**
PBO4**
PBO3**
PBO2**
PBO1
PBO0
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