參數(shù)資料
型號: ST52F514Y3M6
英文描述: IC MAX 7000 CPLD 256 144-TQFP
中文描述: 微控制器
文件頁數(shù): 101/106頁
文件大?。?/td> 648K
代理商: ST52F514Y3M6
ST52F510/F513/F514
101/106
Figure 15.6 Single Master Configuration
15.4.8 Interrupts
Note:
The SPI interrupt events are connected to
the same interrupt vector (see Interrupts chapter).
They generate an interrupt if the corresponding
Enable Control Bit (SPIE) and the interrupt mask
bit (MSKSPI) in the INT_MASK Configuration
Register is set.
MISO
MOSI
MOSI
MOSI
MOSI
MOSI
MISO
MISO
MISO
MISO
SS
SS
SS
SS
SS
SCK
SCK
SCK
SCK
SCK
5V
P
Slave
MCU
Slave
MCU
Slave
MCU
Slave
MCU
Master
MCU
Interrupt Event
Event
Flag
Enable
Control
Bit
Exit
from
Wait
Exit
from
Halt
SPI End of Transfer Event
SPIF
SPIE
Yes
No
Master Mode Fault Event
MODF
Yes
No
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