參數(shù)資料
型號: ST52F514Y0M6
英文描述: IC MAX 7000 CPLD 64 44-TQFP
中文描述: 微控制器
文件頁數(shù): 90/106頁
文件大?。?/td> 648K
代理商: ST52F514Y0M6
ST52F510/F513/F514
90/106
Figure 14.4 Event Flags and Interrupt Generation
Note:
The I
2
C interrupt events are connected to
the same interrupt vector. They generate an
interrupt if the corresponding Enable Control Bit
(ITE) is set and the Interrupt Mask bit (MSKI2C) in
the
INT_MASK
Configuration
unmasked (set to 1, see Interrupts Chapter).
Register
is
ADD10
BTF
ADSL
SB
AF
STOPF
ARLO
BERR
EVF
INTERRUPT
ITE
*
*
EVF can also be set by EV6 or an error from the I2C_SR2 register.
Interrupt Event
Event
Flag
Enable
Control
Bit
Exit
from
Wait
Exit
from
Halt
10-bit Address Sent Event (Master Mode)
ADD10
ITE
Yes
No
End of Byte Transfer Event
BTF
Yes
No
Address Matched Event (Slave Mode)
ADSEL
Yes
No
Start Bit Generation Event (Master Mode)
SB
Yes
No
Acknowledge Failure Event
AF
Yes
No
Stop Detection Event (Slave Mode)
STOPF
Yes
No
Arbitration Lost Event (Multimaster configuration)
ARLO
Yes
No
Bus Error Event
BERR
Yes
No
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ST5R33 Programmable Logic IC; Logic Type:Programmable; No. of Macrocells:102; Package/Case:144-TQFP; Leaded Process Compatible:No; Number of Circuits:1728; Peak Reflow Compatible (260 C):No; Mounting Type:surface mount RoHS Compliant: No
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