參數(shù)資料
型號: ST52F514F3M6
英文描述: IC MAX 7000 CPLD 256 256-FBGA
中文描述: 微控制器
文件頁數(shù): 21/106頁
文件大小: 648K
代理商: ST52F514F3M6
ST52F510/F513/F514
21/106
NVM is always located beginning after the first
locations of the addressing space. RAM banks are
always located after NVM.
NVM is organized in accordance to the following
blocks (see Figure 3.2):
I
Reset Vector block (from address 0 to 2)
contains an absolute jump instruction to the first
user program instruction. The Assembler tool
automatically fills these locations with correct
data.
I
Interrupt Vectors block (from location 3 up to
32) contains the interrupt vectors. Each address
is composed of three bytes (the jump opcode
and the 16 bit address). Interrupt vectors are set
by using IRQ pseudo-instruction (see the
Programming Manual).
Figure 3.2 Program/Data Memory Organization
I
Mbfs Setting block (just after the interrupt
vectors) containsthe coordinates ofthevertexes
of every Mbf defined in the program. The last
address that can be assigned to this block is
1023.
This
area
is
according to the size of the fuzzy routines. The
memory area that remains unused, if any, is
assigned to the Program Instructions block.
I
The Program Instructions block (just after the
last Mbf data through the last NVM address)
contains the instructionof the user program and
the permanent data.
dynamically
assigned
I
Option bytes block (from location
307Fh) is the addressing space reserved for the
option bytes. In ST52F510/F513/F514, only the
location from 3000h to 3007h are used.
3000h to
RESET VECTOR
INTERRUPT VECTORS
MEMBERSHIP FUNCTIONS
PARAMETERS
PROGRAM INSTRUCTIONS
AND PERMANENT DATA
PROGRAM INSTRUCTIONS
AND PERMANENT DATA
SYSTEM STACK
DATA
USER STACK
RAM
BENCHS
NON
VOLATILE
MEMORY
OPTION BYTES
~
~
0000h
0003h
0021h
0400h
3000h
307Fh
FF00h
FFFFh
~
~
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