- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄372303 > ST52F514F1B6 IC MAX 7000 CPLD 160 100-TQFP PDF資料下載
參數(shù)資料
| 型號： | ST52F514F1B6 |
| 英文描述： | IC MAX 7000 CPLD 160 100-TQFP |
| 中文描述： | 微控制器 |
| 文件頁數(shù)： | 49/106頁 |
| 文件大小： | 648K |
| 代理商： | ST52F514F1B6 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁當前第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁
ST52F510/F513/F514
49/106
7 I/O PORTS
7.1 Introduction
ST52F510/F513/F514
flexible individually programmable multi-functional
I/O lines. The ST52F510/F513/F514 supplies
devices withup to 3 Ports (named from A to C) with
up to 22 I/O lines.
Each pin can be used as a digital I/O or can be
connected with a peripheral (Alternate Function).
The I/O lines belonging to Port A and Port B can
also be used to generate Port Interrupts.
The I/O Port pins can be configured inthefollowing
modes:
I
Input high impedance (reset state)
I
Input with pull-up
I
Output with pull-up
are
characterized
by
I
Output push-pull
I
Output with weak pull-up
I
Output open drain
I
Interrupt with pull-up
I
Interrupt without pull-up
These
eight
programming three Configuration Registers for
each Port. All the pins that belong to the same Port
can be configured separately by setting the
corresponding bits in the three registers (see
Register Description).
To avoid side effects, the Configuration Registers
register are latched only when the Direction
Register (PORT_x_DDR) is written. For this
reason this register must be always written when
modifying the pin configuration.
All theI/O digital pinsare TTL compatible and have
a Schmitt Trigger. The output buffer can supply
high current sink (up to 8mA).
modes
can
be
selected
by
Figure 7.1 Digital Pin
7.2 Input Mode
The pins configured as input can be read by
accessing the corresponding Port Input Register
by means of the LDRI instruction. The addresses
for Port A , B and C are respectively 0 (00h), 1
(01h), and 2 (02h).
When executing the LDRI instructionall thesignals
connected to the input pins of thePort are read and
the logical value is copied in thespecified Register
File location. If some pins are configured in output,
the port buffer contents, which are the last written
logical values in the output pins, are read.
7.3 Output Mode
The pins configured as output can be written by
accessing the corresponding Port Output Register
by
means
of
the
LDPR,
instructions. The addresses for Port A , B and C
are respectively, 0 (00h), 1 (01h), and 2 (02h).
When executing the above mentioned instructions,
the Port buffer is written and the Port pin signals
are modified. If some pins are configured as input
or as interrupt, the values are ignored.
LDPI
and LDPE
7.4 Interrupt Mode
The pins configured as Interrupt Mode can
generate a Port Interrupt request. Only Port A and
Port B pins can be configured in this mode.
An Interrupt vector is associated to each Port:
there are two Port Interrupts available but more
pins of the ports can act as source at the same
time.
The Configuration Registers switch the signals
deriving from interrupt pins to an OR gate that
generates the interrupt request signal. The signal
deriving from the pins can be read, allowing the
discrimination of the interrupt sources when more
than one pin can generate the interrupt signal.
The interrupttrigger can be configured either in the
rising or falling edge of the external signal.
Figure 7.2 Analog Pin
PAD
PULL UP
ENABLE
DIGIT AL OUT
E NABLE
DA TA
O UT
POR T A,C, D,E
PIN
DA TA
IN
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ST52F514F1M6 | IC MAX 7000 CPLD 256 208-PQFP |
| ST52F514F3B6 | IC MAX 7000 CPLD 256 208-PQFP |
| ST52F514F3M6 | IC MAX 7000 CPLD 256 256-FBGA |
| ST52F514G0B6 | IC MAX 7000 CPLD 256 256-FBGA |
| ST52F514G0M6 | IC MAX 7000 CPLD 64 100-TQFP |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ST52F514F1M6 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Microcontroller |
| ST52F514F3B6 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Microcontroller |
| ST52F514F3M6 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Microcontroller |
| ST52F514FMB6 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:8-BIT INTELLIGENT CONTROLLER UNIT ICU Two Timer/PWMs, ADC, I2C, SPI, SCI |
| ST52F514FMM6 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:8-BIT INTELLIGENT CONTROLLER UNIT ICU Two Timer/PWMs, ADC, I2C, SPI, SCI |
發(fā)布緊急采購，3分鐘左右您將得到回復。