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參數(shù)資料
| 型號(hào)： | ST52F514F1B6 |
| 英文描述： | IC MAX 7000 CPLD 160 100-TQFP |
| 中文描述： | 微控制器 |
| 文件頁數(shù)： | 44/106頁 |
| 文件大?。?/td> | 648K |
| 代理商： | ST52F514F1B6 |
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ST52F510/F513/F514
44/106
6.2 Reset
Four Reset sources are available:
I
RESET pin (external source)
I
WATCHDOG (internal source)
I
POWER ON Reset (Internal source)
I
PLVD Reset (Internal source)
When a Reset event occurs, the user program
restarts from the beginning.
6.2.1 External Reset.
Reset is an input pin. An
internal reset does not affect this pin. A Reset
signal
originated
by
recognized immediately. The RESET pin may be
used to ensure Vdd has risen to a point where the
ICU can operate correctly before the user program
is run. Reset must be set to Vdd in working mode.
A Pull up resistor of 100 K
guarantees that the
RESET pin is at level “1” when no HALT or Power-
On events occur. If an external resistor is
connected to the RESET pin a minimum value of
10K
must be used.
external
sources
is
6.2.2 Reset Procedures.
After the Reset pin is
set to Vdd or following a Power-On Reset event,
the device is not started until the internal supply
voltage has reached the nominal level of 2.5 V
(corresponding roughly to Vdd=2.8 V).
Figure 6.2 Reset Block Diagram
After this level has been
oscillator (10 MHZ) is started and a delay period of
4.096 clock cycles is initiated, in order to allow the
oscillator to stabilize and to ensure that recovery
has taken place from the Reset state.
If the device has been configured to work with the
internal clock, the user program is started,
otherwise the Option Byte 7 (WAKEUP) is read
and another count is started before running the
user program. The count duration depends on the
contents of the Option Byte 7 (WAKEUP), that
works as a prescaler, according to the follwing
formula:
reached, the internal
This delay has been introduced in order to ensure
that the oscillator has become stable after its
restart.
If the Reset is generated by the PLVD or the
Watchdog, the oscillator is not turned off; for this
reason the CPU is then restarted immediately,
without the delay.
After a RESET procedure is completed, the core
reads the instruction stored in the first 3 bytes of
the Program/Data Memory, which contains a
JUMP instruction to the first instruction of the user
program.
The
Assembler
generates this Jump instruction with the first
instruction address.
tool
automatically
POWER-ON
RESET
Vdd
Vdd
RESET
COUNTER x
4096
PLVD
Vdd
INTERNAL RESET
WATCHDOG RESET
PLVD RESET
RST_DELAY
WATCHDOG
CLK_MODE
Delay
4096
WAKEUP
1
+
(
)
Tclk
×
×
=
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ST52F514F1M6 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Microcontroller |
| ST52F514F3B6 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Microcontroller |
| ST52F514F3M6 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Microcontroller |
| ST52F514FMB6 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:8-BIT INTELLIGENT CONTROLLER UNIT ICU Two Timer/PWMs, ADC, I2C, SPI, SCI |
| ST52F514FMM6 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:8-BIT INTELLIGENT CONTROLLER UNIT ICU Two Timer/PWMs, ADC, I2C, SPI, SCI |
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