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參數(shù)資料
| 型號(hào)： | SSM6L05FU |
| 廠商： | Toshiba Corporation |
| 英文描述： | TOSHIBA Field Effect Transistor Silicon N/P Channel MOS Type |
| 中文描述： | 東芝場(chǎng)效應(yīng)晶體管硅N / P系列頻道馬鞍山類型 |
| 文件頁數(shù)： | 3/8頁 |
| 文件大?。?/td> | 205K |
| 代理商： | SSM6L05FU |
SSM6L05FU
2002-01-17
3
Precaution
V
th
can be expressed as voltage between gate and source when low operating current value is I
D
100 A for this
product. For normal switching operation, V
GS
(on)
requires higher voltage than V
th
and V
GS (off)
requires lower
voltage than V
th
. (Relationship can be established as follows: V
GS (off)
V
th
V
GS (on)
)
Please take this into consideration for using the device. V
GS
recommended voltage of 2.5 V or higher to turn on
this product.
Q2 Electrical Characteristics
(Ta 25°C)
Characteristics
Symbol
Test Condition
Min
Typ.
Max
Unit
Gate leakage current
I
GSS
V
GS
12 V, V
DS
0
1
A
Drain-Source breakdown voltage
V
(BR) DSS
I
D
1 mA, V
GS
0
20
V
Drain cut-off current
I
DSS
V
DS
20 V, V
GS
0
1
A
Gate threshold voltage
V
th
V
DS
3 V, I
D
0.1 mA
0.6
1.1
V
Forward transfer admittance
Y
fs
V
DS
3 V, I
D
50 mA
(Note2)
100
mS
I
D
100 mA, V
GS
4 V (Note2)
2.1
3.3
Drain-Source ON resistance
R
DS (ON)
I
D
50 mA, V
GS
2.5 V (Note2)
3.2
4.0
Input capacitance
C
iss
27
pF
Reverse transfer capacitance
C
rss
7
pF
Output capacitance
C
oss
V
DS
3 V, V
GS
0, f 1 MHz
21
pF
Turn-on time
t
on
70
Switching time
Turn-off time
t
off
V
DD
3 V, I
D
50 mA,
V
GS
0~ 2.5 V
70
ns
Note2: Pulse test
Switching Time Test Circuit
(Q2: Pch MOS FET)
Precaution
V
th
can be expressed as voltage between gate and source when low operating current value is I
D
100 A for
this product. For normal switching operation, V
GS
(on)
requires higher voltage than V
th
and V
GS (off)
requires
lower voltage than V
th
. (Relationship can be established as follows: V
GS (off)
V
th
V
GS (on)
)
Please take this into consideration for using the device. V
GS
recommended voltage of 2.5 V or higher to turn on
this product.
(c) V
OUT
V
DD
3 V
Duty
V
IN
: t
r
, t
f
5 ns
(Z
out
50 )
Common Source
Ta 25°C
1%
V
DD
OUT
IN
0
2.5 V
10 s
5
R
L
(b) V
IN
t
on
90%
10%
2.5 V
0 V
90%
10%
t
off
t
r
t
f
V
DS (ON)
V
DD
(a) Test circuit
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