參數(shù)資料
型號(hào): SSD1852
廠商: Electronic Theatre Controls, Inc.
英文描述: LCD Segment / Common Driver With Controller CMOS
中文描述: LCD段/與普通的CMOS驅(qū)動(dòng)器控制器
文件頁數(shù): 14/55頁
文件大?。?/td> 637K
代理商: SSD1852
SSD1852
Rev 1.0
01/2003
SOLOMON
9
6.9
REF
This pin is an input pin to enable the internal reference voltage used for the internal regulator.
When it is high, an internal reference voltage source will be used. When it is low, an external
reference voltage source must be provided in V
EXT
pin if internal regulator is used.
6.10 V
DD
Power supply pin.
6.11 V
SS
Ground.
6.12 V
CI
Reference voltage input for internal DC-DC converter. The voltage of generated V
CC
equals to
the multiple factor (3X, 4X, 5X or 6X) times V
CI
with respect to V
SS
.
Note: voltage at this input pin must be larger than or equal to V
DD.
6.13 V
CC
This is the most positive voltage supply pin of the chip. It can be supplied externally or
generated by the internal DC-DC converter.
When using internal DC-DC converter as generator, voltage at this pin is for internal reference
only. It CANNOT be used for driving external circuitry.
6.14 C
1P
,C
2P
,C
3P
,C
4P
,C
5P
,C
1N
and C
2N
When internal DC-DC voltage converter is used, external capacitor(s) is/are connected among
these pins.
6.15 V
L6
This pin is the most positive LCD driving voltage. It can be supplied externally or generated by
the internal regulator.
6.16 V
R
This pin is an input of the internal voltage regulator. When the internal resistors network for the
voltage regulator is disabled (INTRS is pulled low), external resistors should be connected
between V
SS
and V
R
, and V
R
and V
L6
, respectively.
6.17 V
EXT
This pin is an input to provide an external voltage reference for the internal voltage regulator
when REF pin is pulled L. When internal reference is selected (REF is pulled high), the V
EXT
pin
should be left open (No connection).
6.18 V
L5
, V
L4
, V
L3
, and V
L2
LCD driving voltages. They can be supplied externally or generated by the internal bias divider.
They have the following relationship:
V
L6
> V
L5
> V
L4
> V
L3
> V
L2
> V
SS
1:a bias
V
L5
(a-1)/a*V
L6
V
L4
(a-2)/a*V
L6
V
L3
2/a*V
L6
V
L2
1/a*V
L6
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