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參數(shù)資料
| 型號： | SSD1818ATR1 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | LCD Segment / Common Driver with Controller |
| 中文描述： | LCD段/驅(qū)動器與控制器通用 |
| 文件頁數(shù)： | 28/47頁 |
| 文件大?。?/td> | 642K |
| 代理商： | SSD1818ATR1 |
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Solomon Systech
Mar 2004
P 28/47 Rev 1.2
SSD1818A
9. COMMAND DESCRIPTIONS
Set Lower Column Address
This command specifies the lower nibble of the 8-bit column address of the display data RAM. The
column address will be increased by each data access after it is pre-set by the MCU.
Set Higher Column Address
This command specifies the higher nibble of the 8-bit column address of the display data RAM. The
column address will be increased by each data access after it is pre-set by the MCU.
Set Internal Regulator Resistors Ratio
This command is to enable any one of the eight internal resistor sets for different regulator gain when
using internal regulator resistor network (IRS pin pulled high). In other words, this command is used to
select which contrast curve from the eight possible selections. Please refer to Functional Block
Descriptions section for detail calculation of the LCD driving voltage.
Set Power Control Register
This command turns on/off the various power circuits associated with the chip. There are three related
power sub-circuits could be turned on/off by this command.
Internal voltage booster is used to generate the negative voltage supply (V
EE
) from the voltage input (V
SS1
- V
DD
). An external negative power supply is required if this option is turned off.
Internal regulator is used to generate the LCD driving voltage, V
L6
, from the negative power supply, V
EE
.
Output op-amp buffer is the internal divider for dividing the different voltage levels (V
L2
, V
L3
, V
L4
, V
L5
) from
the internal regulator output, V
L6
. External voltage sources should be fed into this driver if this circuit is
turned off.
Set Display Start Line
This command is to set Display Start Line register to determine starting address of display RAM to be
displayed by selecting a value from 0 to 63. With value equals to 0, D0 of Page 0 is mapped to COM0.
With value equals to 1, D1 of Page0 is mapped to COM0 and so on. Display start line values of 0 to 63
are assigned to Page 0 to 7.
Please refer to Table 4 on Page 20 as an example for display start line set to 56 (38h).
Set Contrast Control Register
This command adjusts the contrast of the LCD panel by changing the LCD driving voltage, V
L6
, provided
by the On-Chip power circuits. V
L6
is set with 64 steps (6-bit) in the contrast control register by a set of
compound commands. See Figure 8 for the contrast control flow.
Figure 8 - Contrast Control Flow Set Segment Re-map
No
Yes
Changes
Complete
Set Contrast Control Register
Contrast Level Data
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| SSD1818AZ | LCD Segment / Common Driver with Controller |
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相關(guān)代理商/技術(shù)參數(shù) |
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| SSD1818AZ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:LCD Segment / Common Driver with Controller |
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| SSD1820ATR1 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:LCD Segment / Common Driver with Controller CMOS |
| SSD1820AZ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:LCD Segment / Common Driver with Controller CMOS |
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