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參數(shù)資料
| 型號： | SPL11A |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | SPL11A PROGRAMMING GUIDE |
| 中文描述： | SPL11A節(jié)目指南 |
| 文件頁數(shù)： | 28/42頁 |
| 文件大?。?/td> | 1865K |
| 代理商： | SPL11A |
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SPL11A PROGRAMMING GUIDE
PRELIMINARY
Duty Control of LCD
BIT
Mode
b2
(DUTY2)
b1
(DUTY1)
b0
(DUTY0)
1/3 Duty
0
0
0
1/4 Duty
0
0
1
1/5 Duty
0
1
0
1/8 Duty
0
1
1
1/9 Duty
1
0
0
1/10 Duty
1
0
1
1/11 Duty
1
1
0
1/12 Duty
1
1
1
Bias Control of LCD
bit
Mode
b4
(BIAS1)
b3
(BIAS0)
1/2 Bias
0
0
1/3 Bias
0
1
1/4 Bias
1
X
Note:
1. If 1/4 bias is selected, the pins of V3_INB5, CPU3_INB6 and CPU4_INB7 will not perform as ordinary I/O
functions; instead, they are used for V3, CPU3 and CPU4 for bias circuit. For 1/2 and 1/3 bias options,
these pins are used for I/O purpose.
2. When duty is over 1/8, Sunplus recommends using 1/4 bias for LCD quality improvement.
LCD operating mode
BIT
Mode
b6
(LCDMOD1)
b5
(LCDMOD0)
LCD OFF
0
0
NORMAL
0
1
All dots ON
1
0
All dots OFF
1
1
Default: LCD off, meaning both common and segment are remained low.
LCD pump clock control
Sunplus Technology Co., Ltd.
PAGE 28
V0.1 – OCT. 23, 2002
Bit
Mode
b7
(PUMPCK)
Pump clock = 8K
0
Pump clock = 32K
1
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