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參數(shù)資料
| 型號： | SN74LS273N |
| 廠商： | MOTOROLA INC |
| 元件分類： | 通用總線功能 |
| 英文描述： | OCTAL D FLIP-FLOP WITH CLEAR |
| 中文描述： | LS SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDIP20 |
| 封裝： | PLASTIC, DIP-20 |
| 文件頁數(shù)： | 4/8頁 |
| 文件大?。?/td> | 117K |
| 代理商： | SN74LS273N |
SN74LS273
http://onsemi.com
4
1.3 V
*The shaded areas indicate when the input is permitted to
*
change for predictable output performance.
1.3 V
1.3 V
1.3 V
1.3 V
1.3 V
CP
D
Q
n
t
s
(H)
t
h
(H)
t
s
(L)
t
h
(L)
1/f max
t
PLH
t
PLH
t
PHL
t
PHL
MR
CP
Q
n
Q
n
1.3 V
1.3 V
1.3 V
1.3 V
1.3 V
1.3 V
t
rec
t
PHL
t
PLH
t
W
1.3 V
1.3 V
1.3 V
*
t
W
Figure 1. Clock to Output Delays, Clock Pulse Width,
Frequency, Setup and Hold Times Data to Clock
Figure 2. Master Reset to Output Delay, Master Reset
Pulse Width, and Master Reset Recovery Time
AC WAVEFORMS
DEFINITION OF TERMS
SETUP TIME (t
s
) — is defined as the minimum time
required for the correct logic level to be present at the logic
input prior to the clock transition from LOW-to-HIGH in
order to be recognized and transferred to the outputs.
HOLD TIME (t
h
) — is defined as the minimum time
following the clock transition from LOW-to-HIGH that the
logic level must be maintained at the input in order to ensure
continued recognition. A negative HOLD TIME indicates
that the correct logic level may be released prior to the clock
transition from LOW-to-HIGH and still be recognized.
RECOVERY TIME (t
rec
) — is defined as the minimum time
required between the end of the reset pulse and the clock
transition from LOW-to-HIGH in order to recognize and
transfer HIGH data to the Q outputs.
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PDF描述 |
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| SN74LS280 | LOW POWER SCHOTTKY |
| SN74LS280D | LOW POWER SCHOTTKY |
| SN74LS280N | LOW POWER SCHOTTKY |
| SN74LS283 | LOW POWER SCHOTTKY |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SN74LS273N | 制造商:Texas Instruments 功能描述:Flip Flop Logic IC |
| SN74LS273N3 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| SN74LS273NE4 | 功能描述:觸發(fā)器 Octal D-Type Flip-Flop w/Clear RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
| SN74LS273NG4 | 制造商:Texas Instruments 功能描述:IC OCTAL D-TYPE FLIP-FLOP 74LC273 |
| SN74LS273NS | 制造商:Texas Instruments 功能描述: |
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