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參數(shù)資料
| 型號： | SN74LS195AN |
| 廠商： | ON SEMICONDUCTOR |
| 元件分類： | 通用總線功能 |
| 英文描述： | LOW POWER SCHOTTKY |
| 中文描述： | LS SERIES, 4-BIT RIGHT PARALLEL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, PDIP16 |
| 封裝： | PLASTIC, DIP-16 |
| 文件頁數(shù)： | 2/8頁 |
| 文件大?。?/td> | 137K |
| 代理商： | SN74LS195AN |
SN74LS195A
http://onsemi.com
2
CONNECTION DIAGRAM DIP
(TOP VIEW)
V
CC
Q
0
Q
1
Q
2
Parallel Enable (Active LOW) Input
Parallel Data Inputs
First Stage J (Active HIGH) Input
First Stage K (Active LOW) Input
Clock (Active HIGH Going Edge) Input
Master Reset (Active LOW) Input
Parallel Outputs
Complementary Last Stage Output
PE
P
0
– P
3
J
K
CP
MR
Q
0
– Q
3
Q
3
0.5 U.L.
0.5 U.L.
0.5 U.L.
0.5 U.L.
0.5 U.L.
0.5 U.L.
10 U.L.
10 U.L.
0.25 U.L.
0.25 U.L.
0.25 U.L.
0.25 U.L.
0.25 U.L.
0.25 U.L.
5 U.L.
5 U.L.
NOTES:
a) 1 TTL Unit Load (U.L.) = 40 A HIGH/1.6 mA LOW.
HIGH
LOW
(Note a)
LOADING
PIN NAMES
LOGIC SYMBOL
2
10
3
4
5
6
7
11
12
13
14
15
1
9
J
CP
KMR
PE
P
0
P
1
P
2
P
3
Q
0
Q
1
Q
2
Q
3
Q
3
V
CC
= PIN 16
GND = PIN 8
NOTE:
The Flatpak version has the same
pinouts (Connection Diagram as
the Dual In-Line Package.
14
13
12
11
10
9
1
2
J
3
K
4
P
0
5
P
1
6
P
2
7
P
3
16
15
8
MR
Q
3
CP
Q
3
PE
GND
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SN74LS195AN3 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| SN74LS195AN84 | 制造商:Motorola 功能描述:74LS195N |
| SN74LS195AND | 制造商:Motorola Inc 功能描述:Shift Register, 16 Pin, Plastic, DIP |
| SN74LS196D | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| SN74LS196FN | 制造商:. 功能描述: |
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