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參數(shù)資料
| 型號： | SN74GTLP21395DGVR |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | TWO 1-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE BUS TRANSCEIVERS WITH SPLIT LVTTL PORT, FEEDBACK PATH, AND SELECTABLE POLARITY |
| 中文描述： | 兩個1位LVTTL至GTLP可調(diào)EDGE的速率總線收發(fā)器與劈開LVTTL港口，反饋路徑，和可選的極性 |
| 文件頁數(shù)： | 2/21頁 |
| 文件大小： | 439K |
| 代理商： | SN74GTLP21395DGVR |
SN74GTLP21395
TWO 1-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE BUS TRANSCEIVERS
WITH SPLIT LVTTL PORT FEEDBACK PATH, AND SELECTABLE POLARITY
SCES350C
–
JUNE 2001
–
REVISED NOVEMBER 2001
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
description (continued)
GTLP is the Texas Instruments derivative of the Gunning Transceiver Logic (GTL) JEDEC standard JESD 8-3.
The ac specification of the SN74GTLP21395 is given only at the preferred higher noise margin GTLP, but the
user has the flexibility of using this device at either GTL (V
TT
= 1.2 V and V
REF
= 0.8 V) or GTLP (V
TT
= 1.5 V
and V
REF
= 1 V) signal levels. For information on using GTLP devices in FB+/BTL applications, refer to TI
application reports,
Texas Instruments GTLP Frequently Asked Questions
,
literature number SCEA019, and
GTLP in BTL Applications
, literature number SCEA017.
Normally, the B port operates at GTLP signal levels. The A-port and control inputs operate at LVTTL logic levels,
but are 5-V tolerant and are compatible with TTL or 5-V CMOS devices. V
REF
is the B-port differential input
reference voltage.
This device is fully specified for live-insertion applications using I
off
, power-up 3-state, and BIAS V
CC
. The I
off
circuitry disables the outputs, preventing damaging current backflow through the device when it is powered
down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power
down, which prevents driver conflict. The BIAS V
CC
circuitry precharges and preconditions the B-port
input/output connections, preventing disturbance of active data on the backplane during card insertion or
removal, and permits true live-insertion capability.
This GTLP device features TI-OPC circuitry, which actively limits the overshoot caused by improperly
terminated backplanes, unevenly distributed cards, or empty slots during low-to-high signal transitions. This
improves signal integrity, which allows adequate noise margin to be maintained at higher frequencies.
High-drive GTLP backplane interface devices feature adjustable edge-rate control (ERC). Changing the ERC
input voltage between low and high adjusts the B-port output rise and fall times.
This allows the designer to
optimize system data-transfer rate and signal integrity to the backplane load.
When V
CC
is between 0 and 1.5 V, the device is in the high-impedance state during power up or power down.
However, to ensure the high-impedance state above 1.5 V, the output-enable (OE) input should be tied to V
CC
through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of
the driver.
terminal assignments
1
2
3
4
A
1T/C
1Y
1OEBY
2T/C
B
GND
GND
2Y
2OEBY
C
VCC
GND
1OEAB
ERC
1B
D
GND
1A
2B
E
2OEAB
2A
BIAS VCC
VREF
GQN PACKAGE
(TOP VIEW)
1
2
3
4
A
B
C
D
E
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| SN74GTLP21395DW | 功能描述:轉(zhuǎn)換 - 電壓電平 Dual 1bit LVTTL-GTLP RoHS:否 制造商:Micrel 類型:CML/LVDS/LVPECL to LVCMOS/LVTTL 傳播延遲時間:1.9 ns 電源電流:14 mA 電源電壓-最大:3.6 V 電源電壓-最小:3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:MLF-8 |
| SN74GTLP21395DWE4 | 功能描述:轉(zhuǎn)換 - 電壓電平 Quad Bus Buffer Gate With 3-State Outputs RoHS:否 制造商:Micrel 類型:CML/LVDS/LVPECL to LVCMOS/LVTTL 傳播延遲時間:1.9 ns 電源電流:14 mA 電源電壓-最大:3.6 V 電源電壓-最小:3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:MLF-8 |
| SN74GTLP21395DWG4 | 功能描述:轉(zhuǎn)換 - 電壓電平 Two 1B LVTTL GTLP Adj Edg RateBus Xcvr RoHS:否 制造商:Micrel 類型:CML/LVDS/LVPECL to LVCMOS/LVTTL 傳播延遲時間:1.9 ns 電源電流:14 mA 電源電壓-最大:3.6 V 電源電壓-最小:3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:MLF-8 |
| SN74GTLP21395DWR | 功能描述:特定功能邏輯 Dual 1bit LVTTL-GTLP RoHS:否 制造商:Texas Instruments 產(chǎn)品: 系列:SN74ABTH18502A 工作電源電壓:5 V 封裝 / 箱體:LQFP-64 封裝:Tube |
| SN74GTLP21395GQNR | 功能描述:特定功能邏輯 Dual 1bit LVTTL-GTLP RoHS:否 制造商:Texas Instruments 產(chǎn)品: 系列:SN74ABTH18502A 工作電源電壓:5 V 封裝 / 箱體:LQFP-64 封裝:Tube |
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