參數(shù)資料
型號(hào): SN74CBTLV16800DGG
廠商: Texas Instruments, Inc.
英文描述: LOW-VOLTAGE 20-BIT FET BUS SWITCH WITH PRECHARGED OUTPUTS
中文描述: 低電壓20位FET總線開關(guān)與預(yù)充電輸出
文件頁數(shù): 5/6頁
文件大?。?/td> 84K
代理商: SN74CBTLV16800DGG
SN74CBTLV16800
LOW-VOLTAGE 20-BIT FET BUS SWITCH
WITH PRECHARGED OUTPUTS
SCDS045F – DECEMBER 1997 – REVISED MAY 1999
5
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
V
CC
= 3.3 V
±
0.3 V
VOH
VOL
From Output
Under Test
CL = 50 pF
(see Note A)
LOAD CIRCUIT
S1
6 V
Open
GND
500
500
tPLH
tPHL
Output
Control
(low-level
enabling)
Output
Waveform 1
S1 at 6 V
(see Note B)
Output
Waveform 2
S1 at GND
(see Note B)
tPZL
tPZH
tPLZ
tPHZ
3 V
0 V
VOH
VOL
0 V
VOL + 0.3 V
VOH – 0.3 V
0 V
Input
3 V
3 V
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
Output
tpd
tPLZ/tPZL
tPHZ/tPZH
Open
6 V
GND
TEST
S1
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR
10 MHz, ZO = 50
, tr
2.5 ns, tf
2.5 ns.
D. The outputs are measured one at a time with one transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. tPZL and tPZH are the same as ten.
G. tPLH and tPHL are the same as tpd.
1.5 V
1.5 V
1.5 V
1.5 V
1.5 V
1.5 V
1.5 V
1.5 V
Figure 2. Load Circuit and Voltage Waveforms
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