參數(shù)資料
型號： SN54LVTH16652WD
廠商： Texas Instruments, Inc.
元件分類： 通用總線功能
英文描述： Octal 3-State Inverting Buffer/Line Driver/Line Receiver; Package: TSSOP 20 LEAD; No of Pins: 20; Container: Tape and Reel; Qty per Container: 2500
中文描述： 的3.3V ABT生根粉16位總線收發(fā)器和寄存器具有三態(tài)輸出
文件頁數(shù)： 1/13頁
文件大?。?/td> 226K
代理商： SN54LVTH16652WD
SN54LVTH16652, SN74LVTH16652
3.3-V ABT 16-BIT BUS TRANSCEIVERS AND REGISTERS
WITH 3-STATE OUTPUTS
SCBS150K – JULY 1994 – REVISED APRIL 1999
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Members of the Texas Instruments
Widebus
Family
State-of-the-Art Advanced BiCMOS
Technology (ABT) Design for 3.3-V
Operation and Low Static-Power
Dissipation
Support Mixed-Mode Signal Operation
(5-V Input and Output Voltages With
3.3-V V
CC
)
Support Unregulated Battery Operation
Down to 2.7 V
Typical V
OLP
(Output Ground Bounce)
< 0.8 V at V
CC
= 3.3 V, T
A
= 25
°
C
I
off
and Power-Up 3-State Support Hot
Insertion
Bus Hold on Data Inputs Eliminates the
Need for External Pullup/Pulldown
Resistors
Distributed V
CC
and GND Pin Configuration
Minimizes High-Speed Switching Noise
Flow-Through Architecture Optimizes PCB
Layout
Latch-Up Performance Exceeds 500 mA Per
JESD 17
ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
Package Options Include Plastic Shrink
Small-Outline (DL) and Thin Shrink
Small-Outline (DGG) Packages and 380-mil
Fine-Pitch Ceramic Flat (WD) Package
Using 25-mil Center-to-Center Spacings
description
The ’LVTH16652 devices are 16-bit bus transceivers designed for low-voltage (3.3-V) V
CC
operation, but with
the capability to provide a TTL interface to a 5-V system environment. These devices can be used as two 8-bit
transceivers or one 16-bit transceiver.
Output-enable (OEAB and OEBA) inputs are provided to control the transceiver functions. Select-control (SAB
and SBA) inputs are provided to select whether real-time or stored data is transferred. A low input level selects
real-time data, and a high input level selects stored data. The circuitry used for select control eliminates the
typical decoding glitch that occurs in a multiplexer during the transition between stored and real-time data.
Figure 1 illustrates the four fundamental bus-management functions that can be performed with the
’LVTH16652 devices.
Copyright
1999, Texas Instruments Incorporated
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus is a trademark of Texas Instruments Incorporated.
SN54LVTH16652 . . . WD PACKAGE
SN74LVTH16652 . . . DGG OR DL PACKAGE
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1OEAB
1CLKAB
1SAB
GND
1A1
1A2
V
CC
1A3
1A4
1A5
GND
1A6
1A7
1A8
2A1
2A2
2A3
GND
2A4
2A5
2A6
V
CC
2A7
2A8
GND
2SAB
2CLKAB
2OEAB
1OEBA
1CLKBA
1SBA
GND
1B1
1B2
V
CC
1B3
1B4
1B5
GND
1B6
1B7
1B8
2B1
2B2
2B3
GND
2B4
2B5
2B6
V
CC
2B7
2B8
GND
2SBA
2CLKBA
2OEBA
相關PDF資料
PDF描述
SN74LVTH16652DGG 3.3-V ABT 16-BIT BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS
SN54LVTH240FK Octal 3-State Non-Inverting Transparent Latch; Package: SOIC-20 WB; No of Pins: 20; Container: Rail; Qty per Container: 38
SN54LVTH240J Octal 3-State Non-Inverting Transparent Latch; Package: SOIC-20 WB; No of Pins: 20; Container: Rail; Qty per Container: 38
SN74LVTH240A 3.3-V ABT OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS
SN74LVTH240ADB 3.3-V ABT OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS
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