參數(shù)資料
型號(hào)： SN54LVT162240
廠商： Texas Instruments, Inc.
英文描述： Analog Multiplexers/Demultiplexers; Package: PDIP-16; No of Pins: 16; Container: Rail; Qty per Container: 500
中文描述： 的3.3V ABT生根粉16位緩沖器/ 3司機(jī)態(tài)輸出
文件頁(yè)數(shù)： 1/12頁(yè)
文件大?。?/td> 210K
代理商： SN54LVT162240
SN54LVT162240, SN74LVT162240
3.3-V ABT 16-BIT BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
SCBS719 – JULY 2000
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Members of the Texas Instruments
Widebus
Family
State-of-the-Art Advanced BiCMOS
Technology (ABT) Design for 3.3-V
Operation and Low Static-Power
Dissipation
Output Ports Have Equivalent 22-
Series
Resistors, So No External Resistors Are
Required
Support Mixed-Mode Signal Operation
(5-V Input and Output Voltages With
3.3-V V
CC
)
Support Unregulated Battery Operation
Down to 2.7 V
Typical V
OLP
(Output Ground Bounce)
<0.8 V at V
CC
= 3.3 V, T
A
= 25
°
C
I
off
and Power-Up 3-State Support Hot
Insertion
Distributed V
CC
and GND Pins Minimize
High-Speed Switching Noise
Flow-Through Architecture Optimizes PCB
Layout
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
Package Options Include Plastic Shrink
Small-Outline (DL), Thin Shrink
Small-Outline (DGG), and Thin Very
Small-Outline (DGV) Packages and 380-mil
Fine-Pitch Ceramic Flat (WD) Package
Using 25-mil Center-to-Center Spacings
NOTE: For tape and reel order entry:
The DGGR package is abbreviated to GR, and
the DGVR package is abbreviated to VR.
description
The ’LVT162240 devices are 16-bit buffers/drivers designed specifically for low-voltage (3.3-V) V
CC
operation
and to improve both the performance and density of 3-state memory address drivers, clock drivers, and
bus-oriented receivers and transmitters. They have the capability to provide a TTL interface to a 5-V system
environment.
These devices can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer and provide inverting
outputs and symmetrical active-low output-enable (OE) inputs.
Copyright
2000, Texas Instruments Incorporated
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus is a trademark of Texas Instruments.
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1OE
1Y1
1Y2
GND
1Y3
1Y4
V
CC
2Y1
2Y2
GND
2Y3
2Y4
3Y1
3Y2
GND
3Y3
3Y4
V
CC
4Y1
4Y2
GND
4Y3
4Y4
4OE
2OE
1A1
1A2
GND
1A3
1A4
V
CC
2A1
2A2
GND
2A3
2A4
3A1
3A2
GND
3A3
3A4
V
CC
4A1
4A2
GND
4A3
4A4
3OE
SN54LVT162240 . . . WD PACKAGE
SN74LVT162240 . . . DGG, DGV, OR DL PACKAGE
(TOP VIEW)
相關(guān)PDF資料
PDF描述
SN54LVT162244A Analog Multiplexers/Demultiplexers; Package: SOIC 16 LEAD; No of Pins: 16; Container: Rail; Qty per Container: 48
SN54LVT16240 Analog Multiplexers/Demultiplexers; Package: SOIC 16 LEAD; No of Pins: 16; Container: Rail; Qty per Container: 48
SN54LVT16952 Analog Multiplexers/Demultiplexers; Package: SO-16 WB; No of Pins: 16; Container: Tape and Reel; Qty per Container: 1000
SN54LVT16952WD Analog Multiplexers/Demultiplexers; Package: SOEIAJ-16; No of Pins: 16; Container: Rail; Qty per Container: 50
SN74LVT16952DGG 3.3-V ABT 16-BIT REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS
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