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參數(shù)資料
| 型號： | SN54AHCT32W |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | QUADRUPLE 2-INPUT POSITIVE-OR GATES |
| 中文描述： | 四2輸入陽性或門 |
| 文件頁數(shù)： | 1/18頁 |
| 文件大?。?/td> | 633K |
| 代理商： | SN54AHCT32W |
SN54AHCT32, SN74AHCT32
QUADRUPLE 2-INPUT POSITIVE-OR GATES
SCLS248L – OCTOBER 1995 – REVISED JULY 2003
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Inputs Are TTL-Voltage Compatible
Latch-Up Performance Exceeds 250 mA Per
JESD 17
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
SN54AHCT32 . . . J OR W PACKAGE
SN74AHCT32 . . . D, DB, DGV, N, NS,
OR PW PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
14
13
12
11
10
9
8
1A
1B
1Y
2A
2B
2Y
GND
V
CC
4B
4A
4Y
3B
3A
3Y
3
2 1 20 19
9 10 11 12 13
4
5
6
7
8
18
17
16
15
14
4A
NC
4Y
NC
3B
1Y
NC
2A
NC
2B
1
1
N
3
3
V
4
2
G
N
SN54AHCT32 . . . FK PACKAGE
(TOP VIEW)
NC – No internal connection
SN74AHCT32 . . . RGY PACKAGE
(TOP VIEW)
1
14
7
8
2
3
4
5
6
13
12
11
10
9
4B
4A
4Y
3B
3A
1B
1Y
2A
2B
2Y
1
3
V
G
description/ordering information
The ’AHCT32 devices are quadruple 2-input positive-OR gates. These devices perform the Boolean function
Y
A
B or Y
A
B in positive logic.
ORDERING INFORMATION
TA
PACKAGE
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
QFN – RGY
PDIP – N
Tape and reel
Tube
SN74AHCT32RGYR
SN74AHCT32N
HB32
SN74AHCT32N
SOIC – D
Tube
SN74AHCT32D
AHCT32
Tape and reel
SN74AHCT32DR
–40
°
C to 85
°
C
SOP – NS
Tape and reel
SN74AHCT32NSR
AHCT32
SSOP – DB
Tape and reel
SN74AHCT32DBR
HB32
TSSOP – PW
Tube
SN74AHCT32PW
HB32
Tape and reel
SN74AHCT32PWR
TVSOP – DGV
Tape and reel
SN74AHCT32DGVR
HB32
CDIP – J
Tube
SNJ54AHCT32J
SNJ54AHCT32J
–55
°
C to 125
°
C
CFP – W
Tube
SNJ54AHCT32W
SNJ54AHCT32W
LCCC – FK
Tube
SNJ54AHCT32FK
SNJ54AHCT32FK
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines
are available at www.ti.com/sc/package.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright
2003, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SN74AHCT32DB | QUADRUPLE 2-INPUT POSITIVE-OR GATES |
| SN74AHCT32DGV | QUADRUPLE 2-INPUT POSITIVE-OR GATES |
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| SN54AHCT373J | OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS |
| SN54AHCT373W | OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS |
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