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| 型號： | SN54ABTE16245WD |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | 16-BIT INCIDENT-WAVE SWITCHING BUS TRANSCEIVERS WITH 3-STATE OUTPUTS |
| 中文描述： | 16位事故波開關(guān)總線收發(fā)器三態(tài)輸出 |
| 文件頁數(shù)： | 8/10頁 |
| 文件大小： | 157K |
| 代理商： | SN54ABTE16245WD |
SN54ABTE16245, SN74ABTE16245
16-BIT INCIDENT-WAVE SWITCHING BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCBS226J
–
JULY 1993
–
REVISED DECEMBER 2001
8
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
From Output
Under Test
CL = 50 pF
(see Note A)
LOAD CIRCUIT FOR OUTPUTS
S2
7 V
Open
500
SWITCHING TABLE
LOADS
tPLH/tPHL (A and B port)
tPLZ/tPZL
tPHZ/tPZH
Up
Up
Up
tPLH
tPHL
Output
Output
Control
(low-level
enabling)
Output
Waveform 1
S2 at 7 V
(see Note B)
Output
Waveform 2
S2 at Open
(see Note B)
VOL
VOH
tPZL
tPZH
tPLZ
tPHZ
3.5 V
3 V
0 V
VOH
VOL
0 V
VOL + 0.3 V
VOH
–
0.3 V
≈
0 V
3 V
Input
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
500
S1
94
3.65 V
2 nF
Open
7 V
Open
RX
RX = 13, 26, or 56
EXTENDED
SWITCHING TABLE
LOADS
tPLH/tPHL/tsk (A port)
tPLH/tPHL/tsk (B port)
tt (A port) (see Note E)
tt (B port) (see Note F)
S1
Down
Up
Down
Up
S2
X
Open
X
Open
S1
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR
≤
10 MHz, ZO = 50
, tr
≤
2.5 ns, tf
≤
2.5 ns.
D. The outputs are measured one at a time with one transition per measurement.
E. tt is measured between 1 V and 2 V of the output waveform.
F. tt is measured between 10% and 90% of the output waveform.
Figure 1
1.5 V
1.5 V
1.5 V
1.5 V
1.5 V
1.5 V
1.5 V
1.5 V
Figure 2. Load Circuit and Voltage Waveforms
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